3D Modular Parallel Computer Assembly With Asynchronous Token Passing
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Solution Overview
Problem
Existing computing systems face inefficiencies in design and assembly, requiring different skills at each layer from chips to systems, leading to high costs, long development times, and vulnerabilities in supply chains, while lacking modular and scalable architectures for high-performance computing.
Innovation Solution
A three-dimensional modular computing system (DICE) using discrete integrated circuit electronics, assembled through a direct-write process combining pick-and-place and 3D printing, with asynchronous communication between modules, enabling rapid, cost-effective, and scalable construction and reconfiguration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional hierarchical chip-to-system assembly is used, then manufacturing precision and reliability are maintained, but device complexity and development time increase significantly
Solution Approach 1:
The system is divided into discrete modular units (chips, modules, blades) that can be independently designed, manufactured, and assembled. Each module contains integrated circuits, memory, and interconnect structures that function as independent computational units, enabling parallel development and reducing overall system complexity
Solution Approach 2:
The patent transitions from traditional two-dimensional planar chip architecture to three-dimensional stacked modular architecture. Multiple computational modules are stacked vertically with interconnect structures enabling communication between layers, adding a spatial dimension that increases capacity without proportionally increasing footprint or complexity
2Adaptability or versatility
If modular three-dimensional assembly is implemented, then productivity and adaptability improve, but manufacturing precision requirements increase
Solution Approach 1:
Modules are pre-assembled with integrated circuits, interconnect structures, and alignment features before final system assembly. The modular units include built-in registration marks and mechanical alignment elements that ensure precise positioning during assembly, reducing the precision requirements for the final assembly process
Solution Approach 2:
Standardized interface structures and connection mechanisms are designed to work across all module types. Universal interconnect structures and mounting features enable the same assembly processes to be applied to different module configurations, reducing the need for specialized precision assembly for each variant
3Power
If high-performance computing architecture is implemented, then computational performance increases, but power consumption increases
Solution Approach 1:
The system enables dynamic task distribution and workload balancing across modular units. Computation can be dynamically allocated to available modules based on performance needs, allowing the system to scale computational resources up or down rather than running all modules at full power continuously
Solution Approach 2:
Different modules can be optimized for specific computational tasks or functions. Specialized modules handle compute-intensive operations while other modules manage memory, I/O, or control functions, allowing each module to operate at optimal efficiency for its designated role rather than all modules consuming equal high power
Data Source
AI summary
A computer system consists primarily of identical modular microcontroller units, interconnecting with one another in a three-dimensional lattice. During operation, each microcontroller communicates asynchronously by relying on token-passing between itself and its neighbors. Programming and construction of such microcontroller units occurs in one operation, through robotic pick-and-place operations that are configured through a graphical user interface. The graphical user interface includes simple drag and drop operations to facilitate a WYSIWYG depiction of the desired build and the final system. The design tools and automated assembly of the disclosed framework introduces system scalability and structural flexibility that are not available with existing supercomputing racks and chassis.