3D NAND Channel Layer Layout for Capacity and Reliability
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Solution Overview
Problem
Existing semiconductor devices face challenges in increasing data storage capacity while maintaining electrical properties and reliability, and ensuring ease of manufacturing.
Innovation Solution
A semiconductor device is designed with a first semiconductor structure that includes a substrate, circuit devices, a lower interconnection structure, and a lower bonding structure, and a second semiconductor structure with a stack structure, channel structures, an upper interconnection structure, and an upper bonding structure. The device incorporates a first material layer with a first conductivity and a second material layer with a second conductivity, where the first material layer overlaps the channel structures, and the second material layer does not.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are disposed three-dimensionally to increase data storage capacity, then storage capacity is improved, but device complexity increases
Solution Approach 1:
The semiconductor device is divided into two separate semiconductor structures that are bonded together. The first semiconductor structure contains circuit devices and lower interconnection structures, while the second semiconductor structure contains the stack structure with channel structures and upper interconnection structures. This segmentation allows each structure to be optimized independently for its specific function, enabling three-dimensional memory configuration without proportionally increasing overall device complexity.
Solution Approach 2:
The invention transitions from two-dimensional memory cell arrangement to three-dimensional configuration by stacking the first and second semiconductor structures vertically. The channel structures extend in the vertical direction through the stack structure, utilizing the third dimension (height) to increase storage capacity while maintaining manageable complexity through modular bonding architecture.
2Reliability
If multiple material layers with different conductivities are added to enhance electrical properties, then electrical properties are improved, but manufacturing complexity increases
Solution Approach 1:
Different material layers with specific conductivity properties are placed at specific locations within the semiconductor structures. The first material layer with first conductivity type and the second material layer with second conductivity type are positioned to provide localized electrical characteristics where needed, enhancing overall electrical properties without requiring complete restructuring of the entire device.
Solution Approach 2:
The semiconductor device employs composite material architecture by combining multiple material layers with different conductivity types (first conductivity and second conductivity) within the same device structure. This composite approach allows optimization of electrical properties through material selection and arrangement, while the modular bonding structure facilitates manufacturing by allowing these complex material stacks to be produced separately and then bonded together.
Data Source
AI summary
A semiconductor device includes a first semiconductor structure that includes a first substrate, circuit devices on the first substrate, a lower interconnection structure, and a lower bonding structure; and a second semiconductor structure disposed on and connected to the first semiconductor structure The second semiconductor structure includes a stack structure; channel structures that including a first portion that penetrate through the stack structure in the vertical direction and a second portion that extends upward from the first portion; a first material layer disposed on the stack structure and the channel structure and having first conductivity; and a second material layer disposed between the first material layer and the stack structure and having second conductivity., The first material layer overlaps second portions of the channel structures in the vertical direction, and the second material layer does not overlap the second portions of the channel structures in the vertical direction.