3D NAND Memory Channel Potential Control via Voltage Segmentation
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Solution Overview
Problem
Semiconductor memory devices with three-dimensional array structures face challenges in ensuring the reliability of program, read, and erase operations, particularly due to issues with channel potential management and voltage distribution across cell strings.
Innovation Solution
A method and semiconductor memory device design that involves supplying a negative voltage to word lines and a positive voltage to the common source line to set channels, with voltage gradients managed to ensure consistent channel potential across cell strings, enhancing the reliability of program operations by discharging electrons from unselected channels and isolating them from bit lines during programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage distribution is used in three-dimensional semiconductor memory devices, then device structure is simpler, but reliability of program operations deteriorates due to unintentional programming of unselected cell strings
Solution Approach 1:
The patent segments the voltage distribution strategy by dividing word lines into different groups (first group and second group) and applying different voltage patterns to each group. The first word line group receives a first voltage that prevents electron discharge, while the second word line group receives a second voltage that discharges electrons from unselected cell strings. This segmentation allows selective control of different cell string groups to prevent unintentional programming while maintaining reliable program operations.
Solution Approach 2:
The patent applies local quality by providing different voltage characteristics to different spatial regions of the memory device. Specifically, cell strings associated with the first word line group experience different electrical conditions compared to cell strings associated with the second word line group. This localized voltage control ensures that unselected cell strings in the second group have their channel potentials controlled to discharge electrons, while unselected cell strings in the first group maintain potentials that prevent electron discharge, thereby preventing unintentional programming.
2Manufacturing precision
If channel potentials are not controlled in unselected cell strings, then device operation is simpler, but unintentional programming occurs reducing data storage accuracy
Solution Approach 1:
The patent applies preliminary action by controlling the channel potentials of unselected cell strings before the actual program operation begins. By pre-discharging electrons from unselected cell strings through appropriate voltage application to the second word line group, the device prevents potential unintentional programming before it can occur. This preliminary control of electrical conditions ensures that only selected cell strings are programmed, maintaining high data storage accuracy.
Solution Approach 2:
The patent changes electrical parameters (voltage levels and timing) to control channel potentials dynamically. Different voltage levels are applied to different word line groups at different times during the program operation sequence. The second word line group receives voltages that cause electron discharge in unselected cell strings, while the first word line group receives voltages that maintain stable channel potentials. This dynamic parameter control ensures precise control over which cell strings undergo programming.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of program operations by preventing unintentional programming of unselected cell strings, ensuring accurate data storage and retrieval by maintaining controlled channel potentials and voltage distributions.
Implementation Method 1
supplying a negative voltage to one or more word lines coupled to cell strings coupled between bit lines and a common source line; and a positive voltage to the common source line to set channels of the cell strings
Implementation Method 2
voltages supplied to the word line groups may get higher according as a distance between a corresponding word line group and the source select line is small
Data Source
AI summary
A semiconductor memory device is provided. The semiconductor memory device includes a memory cell array including cell strings coupled between bit lines and a common source line, each of the cell strings comprising a plurality of memory cells stacked above a substrate. The semiconductor memory device also includes a peripheral circuit configured to supply a negative voltage to one or more word lines coupled to the cell strings and supply a positive voltage to the common source line, wherein the peripheral circuit supplies the positive voltage and the negative voltage before a program operation is performed.