3D NAND Cross-Point Source Connection for Lower ACS Resistance

The conductive channel is segmented into multiple parallel paths by introducing additional ACS structures. Instead of relying on a single tall ACS structure with high resistance, the channel is divided into several shorter segments that are electrically parallel, reducing the overall resistance and preventing ground noise while maintaining the required storage capacity.

The solution transitions from a vertical dimension problem (tall ACS structures) to a horizontal dimension solution (multiple parallel ACS structures). By adding more ACS structures in the lateral direction rather than increasing the height of individual structures, the patent achieves lower resistance without increasing the vertical stack height, thus avoiding ground noise issues.

Instead of widening a single ACS region, the conductive channel is segmented into multiple narrower parallel paths. Each individual ACS structure maintains a manageable width that avoids excessive tungsten stress, while the collective arrangement of multiple such structures achieves the required low resistance through parallel conduction paths.

The patent changes the geometric parameters of the ACS structures by reducing the height-to-width ratio. Instead of tall and narrow structures that require excessive width to reduce resistance, the solution uses multiple shorter and wider structures, fundamentally changing the dimensional parameters to achieve lower resistance without increasing die area.