3D NAND Stack Dielectric Layout for Cell Isolation and Breakdown Voltage
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Solution Overview
Problem
Conventional 3D NAND Flash memory devices face issues such as charge migration between memory cells due to continuous storage node materials, leading to cell-to-cell interference, poor word line to word line leakage, and low breakdown voltage, which affect data retention and program/erase windows.
Innovation Solution
The use of dielectric materials comprising alternating layers of oxide and nitride materials, including high-k dielectric materials and silicon nitride, with air gaps between conductive materials to prevent electron back injection and enhance dielectric breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If continuous storage node material is used, then manufacturing simplicity is improved, but cell-to-cell interference increases due to charge migration
Solution Approach 1:
The continuous storage node material is divided into discrete segments or islands that are electrically isolated from each other by dielectric materials. This segmentation prevents charge migration between adjacent memory cells while maintaining the storage functionality within each cell, thereby resolving the cell-to-cell interference issue without significantly complicating the manufacturing process.
2Reliability
If discontinuous storage node material is used, then cell-to-cell interference is reduced, but active cell area becomes too narrow to achieve desired program/erase windows
Solution Approach 1:
The dielectric material configuration is optimized locally at the interfaces between storage node segments and channel regions. By positioning dielectric materials specifically at these critical interfaces and using varying thicknesses or compositions in different regions, the design maintains sufficient active cell area for desired program/erase windows while effectively preventing charge migration through strategic isolation points.
3Ease of manufacture
If conventional dielectric materials are used, then manufacturing simplicity is maintained, but breakdown voltage is low and word line to word line leakage is poor
Solution Approach 1:
The dielectric materials used for isolating conductive materials and filling air gaps are engineered as composite structures with high-k properties and specific compositional characteristics. These composite dielectric materials provide enhanced breakdown voltage and reduced leakage current while maintaining compatibility with existing manufacturing processes, thus improving reliability without sacrificing manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves dielectric breakdown voltage and program/erase window efficiency by acting as an electron sink, reducing leakage and enhancing cell isolation, resulting in improved performance and reliability of memory devices.
Implementation Method 1
the at least one nitride material may act as an electron sink, preventing electron back injection into memory cells of the electronic device
Implementation Method 2
The dielectric materials may define air gaps between vertically adjacent conductive materials
Data Source
AI summary
An electronic device includes a stack structure including vertically alternating dielectric materials and conductive materials. The dielectric materials define air gaps between vertically adjacent conductive materials and include a first oxide material vertically adjacent to the conductive materials and laterally adjacent to the tunneling material, and a nitride material laterally and vertically adjacent to the first oxide material. The stack structure includes pillars extending vertically through the stack structure, the pillars including cell films adjacent to the dielectric and conductive materials. The cell films include a high-k dielectric material, a barrier oxide material, a storage node material, a tunneling material, and a channel material, wherein segments of each of the high-k dielectric material, the barrier oxide material, and the storage node material are adjacent to the conductive materials. Related methods and systems are also disclosed.