3D NAND Bit-Line Driver Isolation with Through-Substrate DTI
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Solution Overview
Problem
As three-dimensional (3D) memory devices shrink in size, the isolation between peripheral devices such as bit-line drivers becomes increasingly complicated, requiring improved electrical isolation to maintain high density and performance, particularly in achieving low leakage current and high breakdown voltage.
Innovation Solution
The implementation of deep-trench-isolation (DTI) on a second side of the substrate, which extends through the substrate and contacts shallow-trench-isolation on the first side, using trench insulating layers like silicon oxide, silicon nitride, or silicon oxynitride, to provide effective electrical isolation between neighboring peripheral devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the dimensions of 3D memory are reduced to increase storage density, then storage density is improved, but electrical isolation between peripheral devices becomes more difficult to achieve
Solution Approach 1:
The patent transitions from conventional planar isolation to three-dimensional isolation structures. Deep-trench-isolation extends vertically through the substrate from the first side to the second side, creating isolation in the depth dimension rather than only in the lateral plane. This vertical isolation approach maintains effective electrical separation even as lateral dimensions are reduced for higher density.
Solution Approach 2:
The isolation structure employs nested trench configurations where deep-trench-isolation is integrated with shallow-trench-isolation. The deep-trench extends through the substrate and can be combined with shallower trenches formed on the surface, creating a multi-level nested isolation system that provides comprehensive electrical separation at different depths and planes.
2Ease of manufacture
If conventional isolation structures are used in scaled-down 3D memory, then manufacturing is simpler, but leakage current increases and breakdown voltage decreases
Solution Approach 1:
The isolation structure is divided into multiple segments: deep-trench-isolation extending through the substrate and shallow-trench-isolation on the surface. This segmentation allows each trench type to be optimized independently for its specific function, with the deep trench providing bulk isolation and shallow trenches providing surface isolation, collectively reducing leakage current and enhancing breakdown voltage.
Solution Approach 2:
The isolation structure uses composite insulating materials filling the trenches, combining different dielectric materials with complementary properties. This composite approach provides both low leakage current paths and high breakdown voltage tolerance, addressing both reliability concerns simultaneously while maintaining manufacturability through established deposition techniques.
Data Source
AI summary
Embodiments of a three-dimensional (3D) memory device and fabrication methods are disclosed. In some embodiments, the 3D memory device includes a peripheral circuitry formed on a first substrate. The peripheral circuitry includes a plurality of peripheral devices on a first side of the first substrate, a first interconnect layer, and a deep-trench-isolation on a second side of the first substrate, wherein the first and second sides are opposite sides of the first substrate and the deep-trench-isolation is configured to provide electrical isolation between at least two neighboring peripheral devices. The 3D memory device also includes a memory array formed on a second substrate. The memory array includes at least one memory cell and a second interconnect layer, wherein the second interconnect layer of the memory array is bonded with the first interconnect layer of the peripheral circuitry, and the peripheral devices are electrically connected with the memory cells.