3D NAND Error Differentiation for Refresh vs In-Place Reprogramming
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Solution Overview
Problem
Flash memory devices face inefficiencies in data updating due to read disturbance and retention errors, leading to resource consumption and garbage collection issues, as existing methods either refresh or reprogram cells without distinguishing between error types.
Innovation Solution
A system and method that selectively updates NAND flash memory cells by detecting error conditions, distinguishing between read disturbance and retention errors, and initiating either a refresh operation to write data to a new page or a reprogramming operation to rewrite data within the same page, thereby conserving resources and reducing time and resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all flash memory cells are refreshed regardless of error type, then data retention is improved, but resource consumption and garbage collection overhead increase
Solution Approach 1:
The patent applies local quality by differentiating between two types of error-prone cells (read-disturbed cells and retention-error cells) and applying different refresh strategies to each type. Read-disturbed cells receive targeted refresh operations while retention-error cells receive reprogramming, avoiding uniform treatment of all cells and reducing unnecessary resource consumption.
Solution Approach 2:
The patent segments the error correction process into two distinct pathways: one for read-disturbed cells that involves refreshing to a new location, and another for retention-error cells that involves reprogramming in place. This segmentation allows the system to optimize resource usage by applying the appropriate operation to the appropriate cell type.
2Reliability
If read-disturbed cells are refreshed to a new location, then data accuracy is improved, but erase operations and garbage collection are increased
Solution Approach 1:
The patent segments cells into read-disturbed cells and retention-error cells, applying different operations to each. Read-disturbed cells are refreshed to new locations while retention-error cells are reprogrammed in place, preventing unnecessary erase operations and improving overall productivity.
Solution Approach 2:
The patent applies local quality by identifying specific cells with read disturbance errors and refreshing only those cells to new locations, rather than performing blanket refresh operations on entire blocks. This targeted approach reduces the number of erase operations required.
3Loss of energy
If retention-error cells are reprogrammed in place, then resource consumption is reduced, but data accuracy may be compromised without proper error differentiation
Solution Approach 1:
The patent applies local quality by identifying specific cells with retention errors and reprogramming only those cells in place, while leaving other cells unchanged. This targeted approach ensures data accuracy for affected cells while minimizing resource consumption.
Solution Approach 2:
The patent segments the error correction process into two distinct pathways: one for read-disturbed cells that involves refreshing to a new location, and another for retention-error cells that involves reprogramming in place. This segmentation ensures that each cell type receives the appropriate operation for maintaining data accuracy.
4Productivity
If error differentiation is implemented, then operational efficiency is improved, but system complexity increases
Solution Approach 1:
The patent segments the error correction process into two distinct pathways based on error type, with separate handling logic for read-disturbed cells and retention-error cells. This segmentation improves operational efficiency by applying the right operation to the right cell type.
Solution Approach 2:
The patent applies local quality by implementing error differentiation at the cell level, where each cell's error type determines its refresh strategy. This approach balances operational efficiency with manageable complexity by focusing differentiation only where needed.
Data Source
AI summary
NAND cell error remediation technologies are disclosed. The remediation technologies are applicable to 3D NAND. In one example, a storage device may include a processor and a memory device comprising NAND flash memory. The processor is configured to detect an error condition associated with a first page of the NAND flash memory, and determine whether the error condition is associated with a read disturbance or with a retention error. The processor is configured to initiate, if the error condition is associated with the read disturbance, a refresh operation with respect to the page to write data stored at the first page to a second page of the NAND flash memory, and initiate, if the error condition is associated with the retention error, a reprogramming operation with respect to the page to rewrite the data stored at the first page to the first page of the NAND flash memory.