3D NAND Flash Memory RAID Check Code Generation for Data Recovery

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Solution Overview

Problem

Current RAID technology cannot effectively restore data when programming failure occurs in 3D NAND flash memory devices, leading to data loss in adjacent memory blocks due to the generation of only one check code, which limits data recovery capabilities.

Innovation Solution

A data protection method that generates a first check code based on data in the first memory blocks, a second check code based on data in the second memory blocks, and an additional check code by combining these, which is used to restore data in case of loss, utilizing XOR operations and stored in the memory for efficient data recovery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If only one check code is generated for RAID data protection, then storage space is saved, but data recovery capability is insufficient when multiple adjacent memory blocks fail

Engineering Contradiction:
Improvestorage space for check codesVSAvoiddata recovery capability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the check code generation into multiple segments: first check code from first memory blocks, second check code from second memory blocks, and additional check code combining both. This segmentation allows selective use of check codes based on failure patterns, enabling recovery when multiple adjacent blocks fail while managing storage space efficiently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extends the traditional single-dimension check code approach by adding an additional check code dimension that combines information from both first and second memory blocks. This dimensional extension provides redundant protection paths, allowing data recovery from multiple failure scenarios without proportionally increasing storage requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple check codes are generated and stored, then data recovery capability is improved, but storage space requirement increases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidstorage space for check codes
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges the functionality of multiple check codes by generating an additional check code that combines information from both first and second memory blocks through XOR operations. This merging approach provides comprehensive protection against multiple failure patterns while using minimal additional storage space compared to storing separate check codes for each memory block.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the parameter of check code generation from single-source to multi-source by deriving the additional check code from both first and second check codes. This parameter change enables the system to handle multiple failure scenarios with limited additional storage, as the additional check code serves multiple recovery purposes simultaneously.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If programming is performed in parallel across multiple memory blocks, then programming speed is improved, but data loss risk increases due to adjacent block failures

Engineering Contradiction:
Improveprogramming speedVSAvoiddata loss risk
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary action by generating check codes during the programming process itself, rather than after programming completes. This allows the system to prepare recovery information in advance, enabling rapid data restoration if programming failures occur in parallel operations, thus maintaining both high speed and reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms by using generated check codes to verify programming success and enable recovery. The check codes provide continuous feedback about data integrity during and after parallel programming operations, allowing the system to detect and correct failures without compromising overall programming speed.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the restoration of data in 3D NAND flash memory devices by reducing the storage space required for check codes, minimizing cache operations, and improving system performance by reducing the number of read and write operations, thereby enhancing data integrity and storage speed.

Implementation Method 1

generating a first check code based on the data stored in corresponding first memory blocks of each of the plurality of memory modules and generating a second check code based on the data stored in corresponding second memory blocks of each of the plurality of memory modules; and generating an additional check code based on the first check code and the second check code

Methodology Applied
Scientific EffectXOR operation:

Data Source

PatentUS12118228B2Data protection method for memories and memory device thereof
Publication Date: 2024.10.15 YANGTZE MEMORY TECH CO LTD
  • US12118228B2 patent drawing
  • US12118228B2 patent drawing
  • US12118228B2 patent drawing

AI summary

The present disclosure provides a system. The system includes a memory device and a controller. The memory device is configured to store memory data and includes a plurality of memory modules. Each of the memory modules includes a first memory block and a second memory block. The controller includes a processor and a memory. The controller is operatively coupled to the plurality of memory modules. In an operation on redundant array of independent disks (RAID), the controller is configured to generate a first check code based on memory data in the first memory block of the plurality memory modules, generate a second check code based on memory data in the second memory block of the plurality memory modules, and generate an additional check code based on the first check code and the second check code.