3D NAND Stack Structure With Insulative Liners for Data Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing two-dimensional nonvolatile memory devices have reached integration limits, and there is a need for improved operational reliability and integration in three-dimensional nonvolatile memory devices, which are not adequately addressed by current manufacturing methods and structures.
Innovation Solution
A semiconductor device with a stack structure of alternately stacked insulating and conductive layers, including a channel structure, data storage patterns, blocking patterns, insulating patterns, and insulative liners, where the insulating and insulative liners protrude further than the conductive layers, enhancing the structure's stability and integration by forming a memory cell or select transistor configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-dimensional nonvolatile memory devices are used, then manufacturing is simpler, but integration density is limited
Solution Approach 1:
The patent transitions from two-dimensional memory cell arrangement to three-dimensional vertical stacking, where multiple insulating and conductive layers are stacked alternately to form memory cells in the vertical direction, thereby increasing integration density while maintaining manufacturability through established thin-film deposition techniques
2Quantity of substance
If three-dimensional memory device structure is implemented, then integration density is improved, but manufacturing complexity increases
Solution Approach 1:
The memory device is segmented into multiple functional layers including insulating layers, conductive layers, data storage patterns, blocking patterns, and insulative liners, where each layer performs a specific function and can be manufactured using standardized processes, thereby managing structural complexity through modular design
Solution Approach 2:
The patent employs nested structures where insulative liners surround insulating patterns, data storage patterns are positioned between conductive layers, and blocking patterns are interposed at specific interfaces, creating a compact multi-layered configuration that maximizes integration density
3Reliability
If insulating patterns and insulative liners protrude farther than conductive layers, then data retention is improved, but manufacturing precision requirements increase
Solution Approach 1:
The insulating patterns and insulative liners are formed to protrude farther than the conductive layers in advance, creating overhang structures that provide preliminary protection and define precise boundaries for subsequent pattern formation, thereby improving data retention while establishing clear alignment references that reduce manufacturing precision requirements
4Productivity
If vertical stacking of insulating and conductive layers is implemented, then program and erase speed is increased, but structural stability challenges arise
Solution Approach 1:
The patent applies different material properties and structural characteristics to different regions: insulating layers provide electrical isolation, conductive layers provide charge storage, blocking patterns control charge movement, and insulative liners provide mechanical support and stress relief, with each component optimized for its local function to maintain structural stability during high-speed operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed semiconductor device structure improves data retention characteristics and integration density, increasing the program and erase speed while maintaining the stability of memory cells, thus overcoming the limitations of existing two-dimensional devices.
Implementation Method 1
forming insulative liners respectively surrounding the insulating patterns by partially oxidizing the data storage layer through the third openings
Data Source
AI summary
A semiconductor device includes: a stack structure including insulating layers and conductive layers, which are alternately stacked; a channel structure penetrating the stack structure; data storage patterns respectively interposed between the conductive layers and the channel structure; blocking patterns respectively interposed between the conductive layers and the data storage patterns; insulating patterns respectively interposed between the insulating layers and the channel structure; and insulative liners interposed between the insulating layers and the insulating patterns, the insulative liners respectively surrounding the insulating patterns.