3D NAND Memory Planes with Multibit Status for Concurrent Commands
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Solution Overview
Problem
Traditional memory operation command protocols prohibit issuance of new commands to non-operating memory planes until current operations are finished, limiting concurrent access to multiple planes in high-density memory systems.
Innovation Solution
A memory system with multiple planes that allows foreground and background operations, using status bits to manage resource availability and enable overlapping commands based on plane states, prioritizing higher-priority operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional memory operation command protocols are used to ensure proper operation control, then operational reliability is maintained, but concurrent access capability to multiple planes is limited
Solution Approach 1:
The memory system is divided into multiple independent planes, each with its own status bits and operation state. This segmentation allows each plane to be accessed and operated independently, enabling concurrent access to multiple planes simultaneously while maintaining proper control through individual status tracking for each plane.
2Productivity
If new commands are issued to non-operating planes only after current operations finish, then operation reliability is ensured, but access efficiency and productivity are reduced
Solution Approach 1:
Status bits are implemented for each plane to provide real-time feedback on operation state (busy/ready, in operation/idle). This feedback mechanism allows the system to make informed decisions about command issuance, enabling new commands to be issued to planes that are ready while current operations continue in other planes, thus improving productivity without sacrificing reliability.
Solution Approach 2:
The system prepares multiple planes in advance by allowing different planes to be in different operation states simultaneously. While one plane is executing a foreground operation, other planes can be prepared for or executing background operations, eliminating waiting time and improving overall access efficiency.
3Productivity
If foreground operations control specific resources exclusively, then resource management reliability is maintained, but resource utilization efficiency and productivity are reduced
Solution Approach 1:
Resource allocation is made dynamic through the foreground/background operation distinction. Specific resources are exclusively controlled during foreground operations when reliability is critical, while allowing background operations to utilize plane core resources when foreground operations are not actively using them. This dynamic allocation maximizes resource utilization while maintaining reliability during critical operations.
Data Source
AI summary
A memory system that is based on 3D NAND flash memory of a high capacity and/or capable of high performance is provided, which includes memory planes, each including a plane core and a specific set of resources. For each memory plane of the plurality of memory planes, the technology provides (i) a corresponding plane busy (PRDY) signal indicating a busy or a ready state of the specific set of recourses of the corresponding memory plane, and (ii) a corresponding plane in operation (PIO#) signal indicating an in operation or idle state of resources used by the plane core of the corresponding memory plane. Issuance of memory commands by a controller and execution of memory commands for a memory plane of the plurality of memory planes is selectively allowed or denied, based on status of one or more of the plurality of PRDY signals and the plurality of PIO# signals.