3D NAND Parity Layout for Tier and Pillar Error Recovery
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Solution Overview
Problem
Existing data storage error protection techniques for 3D NAND architecture are inadequate as they fail to effectively manage errors in both tiers and pillars of memory cells, unlike 2D arrays where errors can be managed using redundant array of independent NAND (RAIN) techniques.
Innovation Solution
The implementation of a method that determines a set of symbols corresponding to data stored in memory cells, adds parity check symbols obliquely oriented to both dimensions, and uses the same number of parity check symbols for protection of memory cells oriented parallel to either dimension, enabling error recovery in both tiers and pillars of a 3D array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error control techniques (RAIN) are used for 2D arrays, then errors can be managed effectively, but these techniques are not suitable for 3D NAND architecture where errors can occur in both tiers and pillars
Solution Approach 1:
The patent extends traditional 2D error protection to 3D NAND architecture by introducing a third dimension (tier dimension) for parity check symbol placement. Parity check symbols are positioned at oblique angles across multiple tiers and pillars, creating a three-dimensional protection structure that can simultaneously detect and correct errors in both tier and pillar directions, making the system adaptable to 3D array architectures.
Solution Approach 2:
The patent creates a universal error protection scheme that functions across different memory cell orientations and array configurations. The same parity check symbol set serves multiple purposes: protecting memory cells oriented parallel to the first dimension, protecting memory cells oriented parallel to the second dimension, and maintaining compatibility with both 2D and 3D NAND architectures through its multi-dimensional placement strategy.
2Reliability
If separate error protection schemes are implemented for tiers and pillars in 3D NAND, then comprehensive error coverage is achieved, but system complexity increases
Solution Approach 1:
The patent merges tier protection and pillar protection into a unified error correction system. A single set of parity check symbols is generated and positioned obliquely to simultaneously protect both tiers and pillars. The controller performs unified encoding and decoding operations that provide comprehensive error coverage for both dimensions without requiring separate protection schemes, thereby reducing overall system complexity while maintaining reliable error coverage.
3Reliability
If more parity check symbols are added to protect both tiers and pillars, then error protection improves, but data volume and processing complexity increase
Solution Approach 1:
The patent employs asymmetric positioning of parity check symbols at oblique angles rather than symmetric placement in traditional dimensions. This asymmetric arrangement allows the same number of parity check symbols to provide protection across multiple dimensions (both tiers and pillars) more efficiently, improving error protection capability without proportionally increasing the total number of symbols required compared to traditional symmetric placement methods.
Data Source
AI summary
Apparatuses and methods for data storage error protection are described. One example apparatus for data storage error protection includes an array of memory cells arranged in a first dimension and a second dimension. A controller is configured to determine a set of symbols corresponding to data stored in the memory cells. The controller is configured to add subsets of the set of symbols obliquely oriented to the first dimension and the second dimension to determine a number of parity check symbols. The controller is configured to use a same number of parity check symbols for protection of a first subset of memory cells oriented parallel to the first dimension as used for protection of a second subset of memory cells oriented parallel to the second dimension.