3D NAND Flash Pre-reading Method for Interference Mitigation
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Solution Overview
Problem
As 3D NAND flash memory devices shrink, interference between memory cells can lead to incorrect reading and programming due to narrowing gaps, causing errors in determining the state of memory cells, which hinders accurate programming.
Innovation Solution
A pre-reading method is implemented before programming, involving specific voltage applications on bit lines, string select lines, and word lines to differentiate between memory cell states by applying distinct pass voltages to adjacent memory cells, creating a voltage window to accurately read and program the first memory cell.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are stacked to increase storage capacity, then storage capacity is improved, but interference between adjacent memory cells increases due to narrowing gaps
Solution Approach 1:
The patent segments the reading process into multiple passes with different voltages. First pass reads adjacent memory cells using a first voltage, second pass reads target memory cell using a second voltage. This temporal and voltage-based segmentation allows differentiation between adjacent cells despite physical proximity, resolving the interference problem while maintaining high storage capacity through vertical stacking.
Solution Approach 2:
The patent changes the voltage parameter across multiple reading passes. By applying different voltage levels (first voltage for adjacent cells, second voltage for target cell) in sequence, the system creates distinguishable reading states. This parameter change enables accurate identification of target cell state without being affected by interference from adjacent cells, allowing reliable operation in high-density stacked architectures.
2Volume of moving object
If gaps between memory cells are narrowed to reduce device size, then device density is improved, but reading accuracy deteriorates due to interference
Solution Approach 1:
The patent performs preliminary reading of adjacent memory cells before reading the target cell. By first applying the first voltage to read adjacent cells and record their states, then subsequently applying the second voltage to read the target cell, the system prepares the reading environment in advance. This preliminary action allows the target cell to be read accurately without interference from adjacent cells, maintaining reading accuracy despite narrowed gaps.
Solution Approach 2:
The patent employs periodic voltage application in sequence: first voltage for adjacent cells, then second voltage for target cell. This periodic action with distinct voltage levels creates temporal separation in the reading process, allowing the system to distinguish between adjacent and target cells based on the sequence and voltage levels, thereby maintaining reading accuracy in high-density configurations.
3Productivity
If multiple memory cells are read simultaneously, then reading speed is improved, but error rate increases due to interference
Solution Approach 1:
The patent segments the reading operation into distinct temporal phases: first pass for adjacent memory cells, second pass for target memory cell. Although sequential rather than simultaneous, this segmentation with different voltage levels enables reliable identification of target cell state without interference, maintaining high reliability while achieving efficient reading through optimized sequential access patterns.
Data Source
AI summary
A pre-reading method and a programming method for a 3D NAND flash memory are provided. The pre-reading method comprises the following steps. A selected string includes a first memory cell, two second memory cells and a plurality of third memory cells. The two second memory cells are adjacent to the first memory cell. The third memory cells are not adjacent to the first memory cell. A first pass voltage is applied on the second memory cells, a second pass voltage is applied on the third memory cells, and a read voltage is applied on the first memory cell via a plurality of word lines for reading a data of the first memory cell. The first pass voltage is larger than the second pass voltage.