3D NAND Memory Programming Voltage Sequence Control

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Solution Overview

Problem

In three-dimensional semiconductor memory devices, existing programming methods often result in program disturbances due to voltage differences between selected and unselected word lines, leading to unreliable data retention and increased risk of threshold voltage changes in memory cells.

Innovation Solution

A method where the program voltage is applied to a selected word line before a pass voltage is applied to unselected word lines when the selected word line satisfies a precharge condition, ensuring a controlled voltage sequence to minimize channel voltage differences and prevent thermal electron generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a pass voltage is applied to unselected word lines simultaneously with or before the program voltage is applied to the selected word line, then the programming operation can proceed efficiently, but program disturbances occur due to voltage differences causing thermal electron generation and threshold voltage changes in memory cells

Engineering Contradiction:
Improveprogramming operation efficiencyVSAvoiddata retention reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies the program voltage to the selected word line before applying the pass voltage to unselected word lines. This preliminary action ensures that the selected memory cells are already in the programming state when the pass voltage is applied, preventing thermal electron generation and threshold voltage changes in unselected cells while maintaining efficient programming operation

Inventive Principle:
Principle #10Preliminary action

2Speed

If a high program voltage is applied to the selected word line, then the programming speed and effectiveness are improved, but program disturbances increase due to larger voltage differences with unselected word lines

Engineering Contradiction:
Improveprogramming speedVSAvoidprogram disturbance
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent applies the program voltage to the selected word line before applying the pass voltage to unselected word lines. This timing sequence ensures that high program voltages are applied only when needed for effective programming, while minimizing the voltage difference exposure time for unselected cells, thus reducing program disturbances while maintaining high programming speed

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If the voltage application sequence is not controlled, then the programming operation is simpler to implement, but threshold voltage distribution becomes unstable due to program disturbances

Engineering Contradiction:
Improvevoltage control complexityVSAvoidthreshold voltage distribution stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent implements a controlled voltage application sequence where the program voltage is applied to the selected word line before the pass voltage is applied to unselected word lines. This simple yet effective timing control stabilizes the threshold voltage distribution by preventing program disturbances, without requiring complex voltage control mechanisms

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces program disturbances in select memory cells of unselect strings, enhancing data retention and reliability by maintaining a stable threshold voltage distribution across memory cells.

Implementation Method 1

voltage differences between selected and unselected word lines, leading to unreliable data retention and increased risk of threshold voltage changes in memory cells

Methodology Applied
Scientific EffectThermal electron generation: Joule Heating

Data Source

PatentUS9870825B2Nonvolatile memory device and method of programming the same
Publication Date: 2018.01.16 SAMSUNG ELECTRONICS CO LTD
  • US9870825B2 patent drawing
  • US9870825B2 patent drawing
  • US9870825B2 patent drawing

AI summary

A nonvolatile memory device includes a memory cell array, an address decoder, a read & write circuit and control logic. The memory cell array includes a plurality of memory blocks including a plurality of cell strings, each cell string including a plurality of memory cells stacked in a direction perpendicular to a substrate. The control logic controls operations so that in a program operation, when the selected word line satisfies a precharge condition, a program voltage to be applied to the selected word line is applied before a pass voltage to be applied to an unselected word line.