3D NAND Flash Read Setup Bias Application
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In high-density memory, such as 3D NAND memory, the changing resistivity of channel materials over time leads to shifts in threshold voltages, reducing the operating window for memory cells, which affects the reliability of memory operations.
Innovation Solution
A memory system that applies a read setup bias simultaneously to multiple memory cells across blocks and sub-blocks, using a block status table to identify stale blocks and apply the bias in a systematic or background operation, ensuring that memory cells are conditioned for optimal read operations, thereby maintaining the threshold voltages set during programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If read setup bias is applied sequentially to blocks, then current consumption is reduced, but the operating window maintenance becomes slower and less efficient
Solution Approach 1:
The memory array is divided into multiple blocks and sub-blocks that can be independently addressed and biased. This segmentation allows the read setup operation to be applied to multiple discrete units simultaneously, increasing overall operation speed while maintaining granular control over current consumption.
Solution Approach 2:
Multiple sub-blocks within a block are biased simultaneously by applying the read setup bias to all of them in parallel. This merging of operations across multiple sub-blocks increases productivity by performing what would otherwise be sequential operations concurrently, while the block-level control allows current consumption to be managed by activating only necessary blocks.
2Reliability
If read setup bias is applied to all blocks simultaneously, then the operating window is maintained more effectively, but current consumption increases
Solution Approach 1:
The system dynamically determines which blocks require read setup bias application based on their individual states (e.g., stale blocks identified through wear leveling or usage patterns). This dynamic approach ensures that bias is applied only where necessary to maintain the operating window, avoiding unnecessary current consumption in blocks that do not require it.
Solution Approach 2:
Different blocks are treated differently based on their individual needs. Some blocks receive read setup bias while others do not, depending on their specific condition. This localized approach maintains the operating window where needed without incurring the current consumption cost of blanket application across all blocks.
3Loss of time
If blocks are traversed sequentially for read setup operation, then current consumption is controlled, but the operation time increases
Solution Approach 1:
The patent introduces a hierarchical dimension to block organization by dividing blocks into sub-blocks. This allows operations to be performed at multiple levels of granularity, enabling parallel processing within blocks (across sub-blocks) while maintaining systematic control through the block level, thus reducing operation time without proportional increases in current consumption.
Data Source
AI summary
A memory having a plurality of blocks is coupled with control circuits having logic to execute a read setup operation, the read setup operation comprising simultaneously applying a read setup bias to a plurality of memory cells of a selected block of the plurality of blocks. Logic to traverse the blocks in the plurality of blocks can apply the read setup operation to the plurality of blocks. The blocks in the plurality of blocks can include respectively a plurality of sub-blocks, The read setup operation can traverse sub-blocks in a block to simultaneously apply the read setup bias to more than one individual sub-block of the selected block. A block status table can be used to identify stale blocks for the read setup operation. Also, the blocks can be traversed as a background operation independent of read commands addressing the blocks.