3D NAND Wordline Void Filling via Segmented Deposition
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Solution Overview
Problem
In three-dimensional NAND memory arrays, it is challenging to uniformly deposit conductive material within vertically-stacked wordline levels, leading to reduced conductance, increased power consumption, heat generation, and potential device failure due to conventional filling methods that result in pinching-off of voids along slits before complete filling.
Innovation Solution
A method involving the deposition of a first conductive material within voids, followed by etching to remove material from pinch-off regions, and subsequent deposition of a second conductive material to fully fill the voids, utilizing techniques like atomic layer deposition and chemical vapor deposition to ensure uniform filling and prevent pinching-off.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional filling methods are used to deposit conductive material within voids, then the deposition process is simple and fast, but the conductive material pinches off the voids along slits before complete filling, leading to reduced conductance and increased power consumption
Solution Approach 1:
The deposition process is divided into multiple sequential steps: first depositing conductive material to partially fill voids, then etching to remove pinched-off material, and finally depositing additional conductive material to complete the filling. This segmentation resolves the contradiction by achieving complete uniform filling (improving manufacturing precision) while accepting increased process complexity.
Solution Approach 2:
The first deposition step performs a preliminary action of partially filling the voids with conductive material before the pinching-off problem occurs. This preliminary filling establishes a foundation that, when combined with subsequent etching and completion steps, achieves complete uniform filling without the harmful pinching-off effect.
2Reliability
If conventional filling methods are used, then the process is straightforward, but conductance is reduced due to pinching-off of voids
Solution Approach 1:
The manufacturing process is segmented into distinct stages: preliminary deposition, etching of pinched-off regions, and completion deposition. This segmentation improves device reliability by ensuring complete void filling without pinching-off, while recognizing that the process becomes less easy to manufacture due to multiple steps.
Solution Approach 2:
The etching step extracts and removes the pinched-off conductive material that would otherwise compromise device reliability. By taking out the defective material and replacing it with additional conductive material in the completion step, the process achieves complete filling and improved reliability despite increased manufacturing complexity.
3Use of energy by moving object
If conventional filling methods are used, then power consumption increases due to incomplete filling, but the deposition process remains simple
Solution Approach 1:
The segmented deposition process (preliminary deposition, etching, completion deposition) ensures complete filling of voids with conductive material, eliminating the pinching-off problem that causes increased power consumption. While this improves energy efficiency, it reduces deposition productivity due to multiple process steps.
Solution Approach 2:
The etching step removes pinched-off conductive material that would create incomplete filling and subsequent power consumption issues. By extracting this defective material and replacing it in the completion step, the process achieves complete filling and reduced power consumption at the cost of decreased deposition efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for more uniform deposition of conductive material within voids, enhancing conductance, reducing power consumption, and preventing device failure by ensuring complete filling of voids without pinching-off, thereby improving the performance and reliability of three-dimensional NAND memory arrays.
Implementation Method 1
utilizing techniques like atomic layer deposition and chemical vapor deposition to ensure uniform filling and prevent pinching-off
Implementation Method 2
utilizing techniques like atomic layer deposition and chemical vapor deposition to ensure uniform filling and prevent pinching-off
Implementation Method 3
followed by etching to remove material from pinch-off regions
Data Source
AI summary
Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.