3D NAND Select Gate Transistor with Single-Crystal Silicon Channel
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in fabricating select gate transistors with independent optimization of threshold voltage and channel material, leading to variations in threshold voltage and on-off characteristics.
Innovation Solution
The method involves using a single crystalline silicon channel for select gate transistors, with a laser thermal anneal process to increase silicon grain size, and separate oxide and polysilicon layers adjacent to the transistors, allowing independent tuning of threshold voltage and improved control over SGD transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polysilicon channel is used for select gate transistors, then manufacturing is easier, but threshold voltage distribution becomes wider and on-off characteristics are poorer
Solution Approach 1:
The patent applies local quality by using different channel materials for different transistor types within the same memory device. Specifically, single crystal silicon is used for select gate transistors to achieve narrow threshold voltage distribution and excellent on-off characteristics, while polysilicon channels are used for memory cell transistors where ease of manufacture is prioritized. This localized material differentiation resolves the contradiction between manufacturing ease and threshold voltage precision.
Solution Approach 2:
The patent segments the channel material selection by transistor function. The manufacturing process is divided into separate pathways: one for forming single crystal silicon channels in select gate transistor regions, and another for forming polysilicon channels in memory cell regions. This segmentation allows each transistor type to have optimized material properties independent of the other, resolving the contradiction between ease of manufacture and manufacturing precision.
2Manufacturing precision
If single crystal silicon is used for select gate transistor channel, then threshold voltage distribution becomes narrower and on-off characteristics improve, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by forming the single crystal silicon channel in the select gate transistor region before other processing steps. The single crystal silicon is deposited and patterned early in the manufacturing sequence, establishing the high-precision channel structure before subsequent layer formations. This preliminary establishment of the critical channel structure allows for better control over threshold voltage distribution while managing overall device complexity through structured process sequencing.
Solution Approach 2:
The patent changes the material parameter from polysilicon to single crystal silicon specifically for select gate transistor channels. This parameter change in crystal structure (from polycrystalline to single crystal) fundamentally improves the electrical characteristics and threshold voltage distribution. The selective application of this material parameter change only where needed (in select gate regions) balances the improvement in manufacturing precision with the increase in device complexity.
3Adaptability or versatility
If separate oxide and polysilicon layers are provided adjacent to select gate transistors, then independent tuning of threshold voltage is enabled, but device structure becomes more complex
Solution Approach 1:
The patent segments the gate structure into separate oxide layers and polysilicon layers adjacent to the select gate transistor channel. This segmentation allows independent control and tuning of threshold voltage through separate doping and processing of each layer. The oxide layer can be independently doped to adjust threshold voltage while the polysilicon layer serves as the control gate, enabling versatile and independent tuning capabilities despite increased structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables narrower threshold voltage distribution, avoids the need for programming the SGD transistor, and enhances control over on-off characteristics, allowing for multiple SGD transistors with crystalline or polysilicon channels.
Implementation Method 1
performing a laser thermal anneal process on the polysilicon channel to produce crystalline silicon
Implementation Method 2
performing a laser thermal anneal process on the polysilicon channel to increase silicon grain size and transform polysilicon into crystalline silicon
Data Source
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AI summary
A fabrication process for a 3D memory structure provides a single crystal silicon channel for a drain-side select gate (SGD) transistor using a laser thermal anneal (LTA). The 3D memory structure includes a stack formed from an array of alternating conductive and dielectric layers. A NAND string is formed by filling a memory hole with memory films, including a charge trapping material, a tunnel oxide and a polysilicon channel. In one case, a separate oxide and polysilicon forms the SGD transistor gate oxide and channel respectively, where LTA is performed on the polysilicon. In another case, the same oxide and polysilicon are used for the SGD transistor and the memory cells. A portion of the polysilicon is converted to single crystal silicon. A back side of the single crystal silicon is subject to epitaxial growth and thermal oxidation via a void in a control gate layer.