3D NAND SSL Cut Layout for Higher Array Density

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Solution Overview

Problem

Three-dimensional (3D) NAND flash memory devices face limitations in scalability due to increased pitch between elements as more layers are stacked, which reduces the number of horizontally oriented elements and occupies large chip areas with wide common source lines (CSLs), limiting the density of memory cells.

Innovation Solution

Implementing multiple string select line (SSL) cuts between adjacent CSLs, which separate the 3D array of memory cells into independent units, allowing for more vertical channels and strings by reducing the number of CSLs and optimizing chip area usage, with SSL cuts being filled with insulating material and extending only to the top part of the conductive layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If more layers are stacked in 3D NAND structures, then array density is improved, but pitch between elements increases and number of horizontal elements decreases

Engineering Contradiction:
Improvearray densityVSAvoidpitch between elements
Core Design Contradiction:
Quantity of substanceVSLength of moving object

Solution Approach 1:

The patent divides the 3D NAND array into multiple independent units by introducing SSL cuts that partition the array between adjacent common source lines. This segmentation allows each unit to be independently addressed and controlled, enabling higher density packaging without increasing overall pitch requirements.

Inventive Principle:
Principle #1Segmentation

2Strength

If wide common source lines are used to separate memory cell portions, then structural stability is improved, but chip area occupied increases and memory cell density decreases

Engineering Contradiction:
Improvestructural stabilityVSAvoidchip area
Core Design Contradiction:
StrengthVSArea of stationary object

Solution Approach 1:

The patent extracts the string select function from the common source line structure by introducing dedicated SSL cuts. This allows the CSLs to be narrower since they no longer need to provide string select functionality, thereby reducing the area occupied by CSLs and increasing memory cell density.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces SSL cuts that extend vertically through multiple conductive layers, adding a vertical dimension to the separation mechanism. This allows for more efficient space utilization compared to horizontal CSL separations, as the SSL cuts can be implemented in the vertical stacking direction where space is more abundant.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If multiple SSL cuts are implemented between adjacent CSLs, then memory cell density is improved, but device complexity increases

Engineering Contradiction:
Improvememory cell densityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the 3D NAND array into multiple independently selectable units using SSL cuts between adjacent CSLs. Each unit can be independently addressed by its corresponding SSL, enabling parallel operations and higher effective density without proportionally increasing control complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The SSL cuts serve multiple functions: they separate memory cell units, provide independent select lines for each unit, and enable parallel read/write operations across different units. This multi-functionality increases density without adding proportional complexity to the control architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11917828B2Memory devices with multiple string select line cuts
Publication Date: 2024.02.27 MACRONIX INTERNATIONAL CO LTD
  • US11917828B2 patent drawing
  • US11917828B2 patent drawing
  • US11917828B2 patent drawing

AI summary

Methods, systems and apparatus for memory devices with multiple string select line (SSL) cuts are provided. In one aspect, a semiconductor device includes: a three-dimensional (3D) array of memory cells and a plurality of common source lines (CSLs) configured to separate the 3D array of memory cells into a plurality of portions. Each portion of the plurality of portions is between two adjacent CSLs and includes a plurality of conductive layers separated from each other by insulating layers and a plurality of vertical channels arranged orthogonally through the plurality of conductive layers and the insulating layers, each of the plurality of vertical channels including a string of memory cells. A top part of each portion of one or more portions includes at least two SSL cuts configured to separate the portion into multiple independent units, and each of the independent units is selectable by a corresponding SSL of multiple SSLs.