3D NAND Storage Node Layout for Reduced Lateral Charge Migration

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Solution Overview

Problem

As 3D NAND devices are miniaturized, cell-to-cell coupling and lateral charge migration increase, leading to program erase and data retention issues due to reduced dimensions and closer spacing of memory cells.

Innovation Solution

The electronic device incorporates reduced charge confinement regions in storage nodes of pillars, achieved by varying the thickness of oxide materials within the pillar region, which increases the separation distance between adjacent charge confinement regions while maintaining continuous storage nodes, thereby reducing lateral charge migration and allowing closer conductive materials to the charge confinement regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are formed closer together and at smaller dimensions to increase integration density, then device integration density is improved, but cell-to-cell coupling and lateral charge migration increase causing program erase and data retention issues

Engineering Contradiction:
Improveintegration densityVSAvoiddata retention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by creating non-uniform oxide material thickness within the pillar structure. The oxide material has varying thickness - thinner in regions adjacent to conductive materials and thicker in other regions - to locally modulate charge confinement properties. This allows reduced charge confinement specifically where needed to prevent lateral charge migration between closely spaced memory cells while maintaining overall high integration density.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes physical parameters by varying the thickness of the oxide material layer within the pillar. By adjusting the oxide material thickness parameter in different regions, the charge confinement characteristics are modified. Thinner oxide regions reduce charge confinement to prevent lateral charge migration, while maintaining the continuous storage node structure for data retention.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If oxide material thickness is increased to reduce lateral charge migration, then charge confinement is improved, but separation distance between adjacent charge confinement regions increases reducing device control

Engineering Contradiction:
Improvecharge confinementVSAvoiddevice control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses local quality by creating spatially varying oxide material thickness within the pillar structure. Thinner oxide regions are positioned adjacent to conductive materials to reduce charge confinement and prevent lateral charge migration, while thicker oxide regions provide enhanced charge confinement where needed. This local differentiation allows simultaneous optimization of both charge confinement and device control without increasing overall separation distance.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11956954B2Electronic devices comprising reduced charge confinement regions in storage nodes of pillars and related methods
Publication Date: 2024.04.09 MICRON TECHNOLOGY INC
  • US11956954B2 patent drawing
  • US11956954B2 patent drawing
  • US11956954B2 patent drawing

AI summary

An electronic device comprises a stack of alternating dielectric materials and conductive materials, a pillar region extending vertically through the stack, an oxide material within the pillar region and laterally adjacent to the dielectric materials and the conductive materials of the stack, and a storage node laterally adjacent to the oxide material and within the pillar region. A charge confinement region of the storage node is in horizontal alignment with the conductive materials of the stack. A height of the charge confinement region in a vertical direction is less than a height of a respective, laterally adjacent conductive material of the stack in the vertical direction. Related methods and systems are also disclosed.