3D NAND String Memory Devices with Enclosed Control Gate Voids
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Solution Overview
Problem
Conventional three-dimensional vertical NAND strings have limitations such as providing only one bit per cell and requiring a complex and time-consuming process for active region formation, resulting in a conical shape that is difficult to achieve.
Innovation Solution
A method for forming a monolithic three-dimensional NAND string involving the formation of alternating layers over a substrate, etching to create recesses, and depositing dielectric and charge storage regions, with control gates separated by blocking dielectrics, allowing for improved scalability and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional sidewall spacer formation and etching processes are used to create active regions, then the process achieves the required structure formation, but the manufacturing complexity and time consumption increase significantly
Solution Approach 1:
The fabrication process is divided into distinct stages: forming sacrificial layers, creating openings, depositing blocking dielectric, forming charge storage regions, and creating control gates. Each stage is independently optimized and can be performed using standard semiconductor fabrication tools, reducing overall process complexity while maintaining manufacturing capability.
Solution Approach 2:
Sacrificial layers are introduced as intermediary structures that facilitate the formation of the final device architecture. These temporary structures enable precise positioning of control gates and charge storage regions without requiring complex direct patterning processes, thereby simplifying the overall fabrication sequence.
2Adaptability or versatility
If conventional NAND string structures are used, then the device can be manufactured with existing processes, but the storage capacity is limited to one bit per cell
Solution Approach 1:
Multiple charge storage regions are nested within a single memory cell structure, with each charge storage region capable of storing one bit of information. This nested configuration enables multi-bit storage per cell while maintaining compatibility with standard planar fabrication processes, as each nested region is formed using sequential deposition and etching steps that are extensions of conventional manufacturing techniques.
3Manufacturing precision
If conventional active region formation processes are used, then the structure can be created, but the resulting conical shape is difficult to achieve and control
Solution Approach 1:
Sacrificial layers are formed in advance with precisely controlled thickness and positioning before the actual active region formation. These pre-formed sacrificial structures serve as templates that define the final geometry of the active regions, enabling precise shape control without requiring complex real-time etching adjustments or specialized equipment.
Data Source
AI summary
A method of making a monolithic three dimensional NAND string includes forming a stack of alternating first and second material layers over a substrate, etching the stack to form a front side opening, partially removing the second material layers through the front side opening to form front side recesses, forming a first blocking dielectric in the front side recesses, forming charge storage regions over the first blocking dielectric in the front side recesses, forming a tunnel dielectric layer and a semiconductor channel over the charge storage regions in the front side opening, etching the stack to form a back side opening, removing the second material layers through the back side opening to form back side recesses using the first blocking dielectric as an etch stop, forming a second blocking dielectric in the back side recesses, and forming control gates over the second blocking dielectric in the back side recesses.