3D NAND Memory Trench Formation via Spacer Alignment
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Solution Overview
Problem
Current three-dimensional NAND memory devices face challenges in achieving high-density storage and efficient fabrication due to misalignment issues during the formation of high aspect ratio trenches, which affect feature spacing and process margins.
Innovation Solution
A method for forming a monolithic three-dimensional NAND memory array with alternating layers of different materials over a substrate, including the creation of trenches with specific sidewall profiles to define active memory cell areas, where the trenches are formed in a way that minimizes misalignment and improves process margins by using photolithography and reactive ion etching techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high aspect ratio trenches are formed using conventional photolithography and etching methods, then three-dimensional NAND memory structures can be created, but misalignment issues occur affecting feature spacing and process margins
Solution Approach 1:
The patent applies preliminary action by forming a mandrel structure and sacrificial layers before creating the final trench pattern. The mandrel is formed first, then sacrificial material is deposited around it, and finally the trench is etched using the sacrificial material as a spacer. This preliminary structuring enables precise alignment without direct photolithography patterning of the final trench location.
Solution Approach 2:
The patent uses sacrificial material as an intermediary element between the mandrel and the final trench structure. The sacrificial material is deposited conformally on the mandrel, then selectively removed to define the trench pattern. This intermediary approach allows precise feature spacing while avoiding direct alignment issues between photolithography steps.
2Quantity of substance
If feature spacing is reduced to increase memory density, then storage capacity increases, but alignment tolerance decreases making fabrication more difficult
Solution Approach 1:
The patent changes the fabrication parameter from direct photolithography patterning to a spacer-based self-aligned approach. By controlling the thickness of the sacrificial material layer deposited conformally on the mandrel, the trench width and spacing are precisely defined by deposition parameters rather than lithography resolution, enabling reduced feature spacing with maintained alignment tolerance.
Solution Approach 2:
The patent transitions from two-dimensional planar patterning to three-dimensional spacer formation. The sacrificial material is deposited in the vertical dimension conformally on the mandrel sidewalls, and the trench pattern is defined by the horizontal projection of this vertical structure. This dimensional transition enables precise spacing control independent of lithography resolution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of high-density NAND memory arrays with improved alignment and reduced misalignment of trenches, enhancing the efficiency and reliability of the fabrication process while maintaining proper feature spacing.
Implementation Method 1
a stack of alternating layers of a first material and a second material different from the first material over a substrate
Implementation Method 2
a stack of alternating layers of a first material and a second material different from the first material over a substrate
Implementation Method 3
the trenches are formed in a way that minimizes misalignment and improves process margins by using photolithography and reactive ion etching techniques
Data Source
AI summary
A memory device includes a stack of material layers with a plurality of NAND strings extending through the stack, and a trench through the stack with a pair of sidewalls defining a width of the trench that is substantially constant or decreases from the top of the trench to a first depth and increases between a first depth and a second depth that is closer to the bottom of the trench than the first depth and the trench has an insulating material covering at least the trench sidewalls. Further embodiments include a memory device including a stack of material layers and an active memory cell region defined between a pair of trenches, and within the active region the stack comprises alternating layers of a first material and a second material, and outside of the active region the stack comprises alternating layers of the first material and a third material.