3D NAND Voltage Pump Circuit for Parasitic Capacitance Reduction
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Solution Overview
Problem
Three-dimensional memory devices face challenges in accessing storage cells quickly while minimizing parasitic capacitance effects, which can lead to propagation delays and hot electron-induced data corruption due to shared nodes and complex control signal applications.
Innovation Solution
A voltage pump circuit generates elevated voltage levels to isolate targeted storage cells, with specific timing and voltage thresholds to decouple unselected columns, reducing parasitic capacitance and preventing hot electron effects, and a signaling approach that monitors output voltage to optimize control signal changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If control signals are applied to access storage cells in three-dimensional memory devices, then storage cells can be accessed, but parasitic capacitance effects cause propagation delays
Solution Approach 1:
The patent applies preliminary action by decoupling unselected columns before accessing the targeted storage cell. The method monitors the output voltage of the voltage pump and triggers the control signal to change only when the voltage reaches a predetermined level, ensuring that unselected columns are already isolated before the access operation begins. This preliminary decoupling prevents parasitic capacitance from causing propagation delays during the actual access operation.
2Reliability
If control signals are applied to access storage cells, then storage cells can be accessed, but hot electron effects can induce data corruption
Solution Approach 1:
The patent applies preliminary anti-action by preventing hot electron effects before they can cause data corruption. The method monitors the voltage pump output and only triggers the control signal change when the voltage reaches a predetermined level, ensuring that unselected columns are decoupled before the access operation begins. This preliminary protective action eliminates the conditions that would generate hot electrons and prevent data corruption in the targeted storage cell.
3Reliability
If voltage levels are elevated to isolate targeted storage cells, then parasitic capacitance is reduced, but complex voltage control is required
Solution Approach 1:
The patent applies feedback by monitoring the output voltage of the voltage pump and using this information to trigger the control signal change. The method continuously observes the voltage level and only activates the decoupling control signal when the voltage reaches the predetermined threshold level. This feedback mechanism simplifies the voltage control complexity by automatically determining when the appropriate voltage level is reached, eliminating the need for complex external voltage control circuits.
Data Source
AI summary
A method is described. The method includes, within a semiconductor memory device comprising a three dimensional storage cell array, pumping a voltage and detecting a level of the pumped voltage. The method also includes causing a voltage level of an access control signal that is applied to the three dimensional storage cell array and whose voltage is derived from the pumped voltage to change in response to the detecting of the level of the pumped voltage. An apparatus is also described. The apparatus includes a semiconductor memory device comprising a three dimensional storage cell array. The semiconductor memory device includes a voltage pumping circuit to produce a pumped voltage, a waveform shaping circuit and a controller circuit.