3D Non-Flat Heat Sink Mounting for Low Inductance Power Electronics
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Solution Overview
Problem
Traditional power electronics designs face challenges in minimizing loop inductance, achieving high thermal performance, and managing high voltage and current densities, which limits the ability to increase power density and efficiency, especially at higher switching frequencies and temperatures.
Innovation Solution
A non-flat geometrical approach using an N-sided thermally conductive object for mounting semiconductors, combined with a printed circuit board or laminated bus bar structure, reduces loop inductance and enhances thermal transfer by allowing three-dimensional interconnects and efficient heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional flat geometry mounting is used, then manufacturing simplicity is maintained, but loop inductance increases and power density is limited
Solution Approach 1:
The patent transitions from traditional two-dimensional flat mounting geometry to a three-dimensional non-flat mounting structure. The semiconductor device is mounted on a curved or angled surface of the heat sink rather than a flat plane, creating a three-dimensional interconnect architecture that reduces loop area and inductance while improving thermal contact.
2Power
If surface area is increased to support higher power, then power processing capability increases, but parasitic inductance increases due to larger loop area
Solution Approach 1:
By moving from planar to three-dimensional mounting geometry, the patent achieves larger effective power processing surface area while maintaining compact loop areas. The vertical or angled mounting approach allows current paths to be shorter and more direct, reducing parasitic inductance even as power capacity increases.
Solution Approach 2:
The patent applies different geometric characteristics to different regions of the mounting structure. The heat sink surface is designed with specific curved or angled regions optimized for low-inductance mounting, while other areas may have different geometries optimized for thermal dissipation or electrical isolation.
3Temperature
If thermal contact pressure is increased, then thermal performance improves, but mechanical stress on devices increases
Solution Approach 1:
The non-flat mounting geometry creates natural load distribution across the semiconductor device package. The curved or angled contact surface distributes mechanical stress more evenly across the device mounting area, reducing peak stresses while maintaining adequate thermal contact pressure through the improved surface conformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables higher switching frequencies, reduced weight, and increased power density by volume, while maintaining mechanical reliability and safety, and supports the use of high-temperature semiconductors like Silicon Carbide, improving overall efficiency and reliability.
Implementation Method 1
the securing member being maintained in tension, thereby to provide a force on each electrical device to press each electrical device against the heat sink body
Implementation Method 2
provide a force on each electrical device to press each electrical device against the heat sink body
Implementation Method 3
heat sink body having peripheral surface with at least one surface for mounting a heat dissipating electrical device
Data Source
AI summary
A first supporting element, e.g. a PCB, may have opposed sides. A heat sink body is mounted on one side of the first supporting element, and having peripheral surface(s) for heat dissipating electrical device. A first circuit includes the heat dissipating electrical device(s) mounted and operates at a first voltage level. At least one circuit board assembly is mounted on the other side of the first supporting element, and extends from a first end to a second end. It has a first end connector at the first end, for connecting the first end of the circuit board assembly to the first circuit, and providing a signal interface between the first circuit operating at the first voltage level and a second circuit operating at a second voltage level different or equal to the first voltage level.