3D NOR Memory Array with Wider Source/Drain Lines for Layer Protection
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Solution Overview
Problem
3D NOR type memory arrays face reliability issues due to damage to the channel and memory layers during manufacturing, primarily caused by the direct contact of masking structures with these layers, leading to incomplete or damaged memory cells.
Innovation Solution
The formation of wider openings within a trench before depositing channel and memory layers, using a sacrificial material and selective etching processes to avoid direct contact and minimize damage, allowing for the formation of source and drain conductive lines without damaging the channel and memory layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If masking structures are used to form source/drain conductive lines in 3D NOR memory arrays, then the manufacturing process can be completed, but the channel and memory layers are damaged due to direct contact with the masking structures
Solution Approach 1:
A sacrificial material is introduced as an intermediary between the masking structure and the channel/memory layers. The masking structure forms openings in the sacrificial material rather than directly contacting the sensitive layers. After source/drain conductive lines are formed using these openings, the sacrificial material is removed, eliminating the harmful direct contact while maintaining the benefits of the masking process.
Solution Approach 2:
The sacrificial material is deposited and patterned before the channel and memory layers are formed. This preliminary action creates protective openings that guide subsequent source/drain formation processes, preventing damage to the channel and memory layers when they are later deposited. The sacrificial material serves as a temporary protective structure that is removed after serving its purpose.
2Reliability
If wider source/drain conductive lines are formed, then current flow and memory cell performance improve, but the complexity of the manufacturing process increases
Solution Approach 1:
The sacrificial material acts as a mediator that simplifies the formation of wider source/drain conductive lines. By using the sacrificial material to define the wider openings, the process avoids the need for complex direct patterning methods on the narrow channel and memory layers, thus achieving wider conductive lines without proportionally increasing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method increases the reliability of the 3D NOR type memory array by preventing damage to the channel and memory layers, ensuring complete and functional memory cells, thereby enhancing the overall performance and density of the memory array.
Implementation Method 1
using a sacrificial material and selective etching processes to avoid direct contact and minimize damage
Data Source
AI summary
In some embodiments, the present disclosure relates to a memory device that includes gate electrode layers arranged over a substrate. A first memory cell is arranged over the substrate and includes first and second source/drain conductive lines that extend through the gate electrode layers. A barrier structure is arranged between the first and second source/drain conductive lines. A channel layer is arranged on outermost sidewalls of the first and second source/drain conductive lines. A first dielectric layer is arranged between the barrier structure and the channel layer. A memory layer is arranged on sidewalls of the channel layer. The first dielectric layer has a first maximum width measured between outermost sidewalls of the first dielectric layer. The first source/drain conductive line has a second maximum width measured between the outermost sidewalls of the first source/drain conductive line. The second width is greater than the first width.