3D Nonvolatile Memory Voltage Increment Control
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Solution Overview
Problem
The development of nonvolatile memory devices with increased storage capacity and performance in a 3D structure faces challenges related to performance, reliability, and durability, necessitating new techniques to improve these aspects.
Innovation Solution
A method for operating nonvolatile memory devices involves counting program loops and incrementing program voltages between successive operations, using a loop counter and control logic to adjust voltage increments based on the number of loops performed, thereby optimizing programming efficiency and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged in a 3D stacked structure to increase storage capacity, then storage capacity increases, but programming reliability and performance deteriorate due to increased complexity in voltage control and programming operations
Solution Approach 1:
The patent divides the programming operation into multiple sequential program loops, where each loop applies a program voltage to a subset of memory cells. This segmentation allows complex 3D memory structures to be programmed in manageable stages, improving reliability by verifying and adjusting voltages between loops rather than attempting to program all cells simultaneously.
Solution Approach 2:
The patent dynamically adjusts the program voltage increment between successive program loops based on the number of loops already performed. The voltage generator modifies the voltage increment value adaptively, allowing the programming process to optimize for both speed and reliability by increasing voltage more aggressively in later loops after initial programming stages are complete.
2Device complexity
If a fixed voltage increment is used in all program loops, then device complexity is reduced, but programming efficiency deteriorates due to inability to optimize for different programming stages
Solution Approach 1:
The patent implements dynamic voltage increment adjustment where the voltage generator changes the program voltage increment based on the current program loop number. This allows the system to use larger voltage increments in later loops (improving efficiency) while maintaining manageable complexity through automated control logic that selects appropriate increment values for each programming stage.
Solution Approach 2:
The patent changes the voltage increment parameter throughout the programming process based on the program loop counter. By modifying this critical parameter adaptively, the system optimizes programming efficiency for different stages of the 3D memory programming process without requiring complex manual intervention, achieving high productivity with controlled complexity.
3Productivity
If program voltage is increased aggressively to improve programming speed, then programming efficiency improves, but reliability deteriorates due to potential over-programming and threshold voltage distribution issues
Solution Approach 1:
The patent uses periodic verification between program loops to check threshold voltage distribution and adjust subsequent voltage increments. This periodic action prevents over-programming by allowing the system to assess the current state of memory cells and modify the voltage increment for the next loop, ensuring reliable threshold voltage control while maintaining high programming speed through optimized voltage scheduling.
Solution Approach 2:
The patent implements feedback control where the outcome of each program loop (threshold voltage distribution, programming success rate) informs the voltage increment selection for the next loop. This feedback mechanism allows the system to automatically adjust the aggressiveness of voltage application, maintaining high programming speed while preventing over-programming and ensuring reliable threshold voltage control throughout the 3D memory structure.
Data Source
AI summary
A method is provided for operating a nonvolatile memory comprising memory cells stacked on a substrate. The method comprises counting a number of program loops performed in a first program operation of selected memory cells connected to a selected wordline, and controlling an increment of a program voltage between successive program loops of a second program operation of the selected memory cells according to the counted number.