3D Stacked Optoelectronic Interfaces for Dense Low-Power Interconnects
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Solution Overview
Problem
Existing chip-to-chip electrical interconnects face limitations in density and power consumption, constraining the performance of advanced packaging technologies like 2.5D and 3D ICs, while optical interconnects offer a solution to these limitations by providing high-density connections with reduced power consumption.
Innovation Solution
Implementing 3D optical interconnects using optoelectronic ICs bonded to base ICs, incorporating microLEDs and photodetectors with Tx and Rx circuitry, and utilizing through silicon vias for electrical connectivity, enabling high-density optical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If electrical interconnects are used for chip-to-chip connections, then electrical connectivity is achieved, but interconnect density is limited and power consumption increases
Solution Approach 1:
The patent replaces electrical interconnects with optical interconnects, substituting the mechanical/electrical field-based signal transmission with optical field-based transmission. This substitution eliminates the fundamental limitations of electrical interconnects regarding density and power consumption, as optical signals can be transmitted through waveguides with minimal interference and lower power requirements.
Solution Approach 2:
The patent transitions from planar (2D) interconnect architectures to three-dimensional (3D) stacked architectures. By stacking multiple layers of optoelectronic interfaces vertically, the system achieves dramatically higher interconnect density (>2500 interconnects per mm²) compared to traditional planar arrangements, effectively utilizing the third dimension to overcome density limitations.
2Length of stationary object
If electrical interconnects are used, then connectivity is established, but maximum reach is limited by capacitance and conductor resistance
Solution Approach 1:
The patent substitutes electrical signal transmission with optical signal transmission through waveguides. This replacement eliminates the RC (resistance-capacitance) limitations that constrain electrical interconnect length and signal integrity. Optical signals in waveguides experience minimal attenuation and interference, enabling much longer reach while maintaining signal quality.
3Quantity of substance
If interconnect density is increased in electrical systems, then more connections are achieved, but conductor width must decrease increasing resistance
Solution Approach 1:
The patent replaces electrical conductors with optical waveguides, eliminating the inverse relationship between conductor width and resistance. In optical waveguides, signal transmission is not constrained by conductor dimensions in the same way, allowing high density interconnects without the power dissipation penalties that plague scaled electrical interconnects.
4Adaptability or versatility
If chiplets are used instead of SoCs, then design flexibility and yield are improved, but inter-chip connection density requirements increase
Solution Approach 1:
The patent applies optical interconnects to chiplet architectures, replacing electrical inter-chip connections with optical waveguides. This substitution enables the high connection densities required for effective chiplet systems, as optical waveguides can be packed more densely and transmit signals over longer distances with lower power consumption, thus supporting modular chiplet designs.
Solution Approach 2:
The patent utilizes 3D stacked optoelectronic interfaces to achieve the high inter-chip connection densities needed for chiplet architectures. By stacking multiple layers vertically with waveguide-based optical interconnects, the system can provide sufficient connection density to support complex chiplet systems while maintaining the design flexibility and yield benefits of modular architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves densities of >2500 interconnects per mm² at 4 Gbps data rates, providing a throughput density of >1 Pbps/cm², surpassing the limitations of electrical interconnects.
Implementation Method 1
an optoelectronic (OE) semiconductor chip having microLEDs and/or photodetectors bonded to an active side of the OE semiconductor chip
Implementation Method 2
an optoelectronic (OE) semiconductor chip having microLEDs and/or photodetectors bonded to an active side of the OE semiconductor chip
Data Source
AI summary
Optoelectronic subassemblies may be bonded to base integrated circuit chips (ICs). The optoelectronic subassemblies may be ICs themselves, with optical emitters and/or photodetectors bonded to those ICs. In some embodiments active sides of the OE ICs may be bonded to active sides of the base ICs. In some embodiments non-active sides of the OE ICs may be bonded to active sides of the base ICs. In some embodiments active sides of the OE ICs may be bonded to non-active sides of the base ICs. And in some embodiments non-active sides of the OE ICs may be bonded to non-active sides of the base ICs.