3D One-Time Programmable Memory Array for High Density Storage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing demand for memory devices in electronic devices poses challenges in achieving high storage density and efficient data storage and retrieval, particularly in volatile and non-volatile memory devices.

Innovation Solution

A three-dimensional memory array utilizing one-time programmable (OTP) cells, each comprising a programmable storage device and a switch, is arranged in a specific configuration to improve storage density and data access efficiency. The OTP cells are connected through global program and read control lines, allowing for simplified routing and increased storage density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory devices use traditional two-dimensional arrangements, then routing is simpler, but storage density is limited

Engineering Contradiction:
Improvestorage densityVSAvoidrouting complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from traditional two-dimensional memory cell arrangements to a three-dimensional stacked architecture. Multiple memory cell layers are vertically stacked and interconnected through through-silicon vias (TSVs), enabling significantly higher storage density without proportionally increasing routing complexity. The global control lines are routed at the substrate level before stacking, simplifying the inter-layer connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If memory devices increase storage capacity, then data retention improves, but access speed decreases

Engineering Contradiction:
Improvestorage capacityVSAvoiddata access speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The memory array is divided into multiple independently addressable memory cell layers stacked vertically. Each layer can be accessed through the same global control lines, allowing parallel access to different layers. This segmentation enables high storage capacity while maintaining fast access speeds by selecting specific layers for read/write operations without accessing the entire memory structure.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution enhances storage density and improves data access efficiency by arranging OTP cells in a three-dimensional array with optimized control line configurations, effectively addressing the challenges of high storage demand in electronic devices.

Implementation Method 1

In one example, a high voltage can be applied to the programmable storage device of the OTP cell, such that oxide break down may occur. Such oxide break down may cause change in a resistance of the programmable storage device of the OTP cell.

Methodology Applied
Scientific EffectOxide breakdown: Avalanche Breakdown

Data Source

PatentUS12205648B2Three-dimensional one time programmable memory
Publication Date: 2025.01.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12205648B2 patent drawing
  • US12205648B2 patent drawing
  • US12205648B2 patent drawing

AI summary

Disclosed herein are related to a memory array including one-time programmable (OTP) cells. In one aspect, the memory array includes a set of OTP cells including a first subset of OTP cells connected between a first program control line and a first read control line. Each OTP cell of the first subset of OTP cells may include a programmable storage device and a switch connected between the first program control line and the first read control line. The first program control line may extend towards a first side of the memory array along a first direction, and the first read control line may extend towards a second side of the memory array facing away from the first side of the memory array.