3D Semiconductor Package Layout Without Wire Bonds or TSVs

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Solution Overview

Problem

Conventional semiconductor package manufacturing methods are inadequate in reducing thickness and cost, particularly for sensor packages, due to reliance on wire bonds and through-silicon vias.

Innovation Solution

A semiconductor device and manufacturing method that employs a three-dimensional package structure without wire bonds, utilizing through-silicon vias, and flip-chip bonding, where a redistribution layer connects bond pads and conductive attachment structures, reducing thickness and eliminating the need for TSVs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonds are used for electrical connections, then reliable electrical connections are achieved, but package thickness increases due to loop height

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidpackage thickness
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent removes wire bonds from the package structure entirely, extracting the problematic loop height while maintaining electrical connectivity through alternative means (direct bonding pads and conductive structures), thereby reducing package thickness without sacrificing connection reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from three-dimensional wire bond loops to a planar two-dimensional connection architecture using bonding pads and conductive structures on the same layer, eliminating the vertical loop height and reducing overall package thickness

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If through-silicon vias (TSVs) are used for vertical connections, then electrical connectivity is achieved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the through-silicon via structure from the manufacturing process, removing the need for complex drilling, plating, and filling operations while maintaining electrical connectivity through alternative planar connection methods

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs simpler, less expensive bonding pad and conductive structure formations that can be integrated into standard semiconductor manufacturing processes, replacing the costly and complex TSV fabrication steps

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS20240258253A1Semiconductor package and manufacturing method thereof
Publication Date: 2024.08.01 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US20240258253A1 patent drawing
  • US20240258253A1 patent drawing
  • US20240258253A1 patent drawing

AI summary

A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device structure (e.g., a sensor device structure), and method for manufacturing thereof, that comprises a three-dimensional package structure free of wire bonds, through silicon vias, and/or flip-chip bonding.