3D Semiconductor Package Using Organic Substrate Redistribution Layers

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Solution Overview

Problem

Current silicon (Si) substrates and Si interposers in semiconductor packages are costly and have low yield, limiting the density of electrical connections and signal transmission rates, necessitating an alternative solution for higher integration and faster signal transmission.

Innovation Solution

A three-dimensional semiconductor package design featuring a package substrate with interconnected redistribution layers and chips, utilizing through silicon vias and micro-bump connection members to reduce package size and enhance signal transmission rates without relying on silicon substrates or interposers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If silicon substrates or Si interposers with through silicon vias are used to increase density of electrical connections and transmission rate, then the transmission rate of electric signals is improved, but the manufacturing cost increases and yield decreases

Engineering Contradiction:

Improvetransmission rate of electric signalsVSAvoidmanufacturing cost and yield

Core Design Contradiction:

SpeedVSEase of manufacture

Solution Approach 1:

The patent replaces expensive silicon substrates or Si interposers with a conventional organic package substrate that can be manufactured using standard PCB processes. This substitution dramatically reduces material cost and manufacturing complexity while achieving the same functional goal of high-speed signal transmission through alternative interconnection methods (redistribution layers and vias in organic substrate).

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the fundamental material parameter from silicon-based substrates to organic package substrates, and alters the interconnection approach from through-silicon-vias to redistribution layers with vias in organic material. This parameter change enables compatibility with existing low-cost manufacturing processes while maintaining high transmission rates.

Inventive Principle:

Principle #35Parameter changes

2Quantity of substance

If silicon substrates or Si interposers are used to achieve higher integration density, then the density of electrical connections is increased, but the manufacturing cost increases and yield decreases

Engineering Contradiction:

Improvedensity of electrical connectionsVSAvoidmanufacturing cost and yield

Core Design Contradiction:

Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent substitutes costly silicon substrates with inexpensive organic package substrates that support high-density interconnections through standard redistribution layer technology. This allows achieving high connection density without the premium cost and low yield associated with silicon-based solutions.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The organic package substrate serves multiple functions: it provides mechanical support, enables high-density electrical interconnections through redistribution layers, and is compatible with standard manufacturing processes. This multi-functionality replaces the specialized silicon substrate that only served interconnection purposes but at high cost.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Ease of manufacture

If conventional package substrates are used, then manufacturing cost is reduced, but the transmission rate of electric signals and density of integration are limited

Engineering Contradiction:

Improvemanufacturing costVSAvoidtransmission rate of electric signals

Core Design Contradiction:

Ease of manufactureVSSpeed

Solution Approach 1:

The patent transitions from planar two-dimensional interconnection to three-dimensional vertical interconnection using multiple redistribution layers and vias through the organic substrate. This dimensional change enables high-speed signals to travel shorter vertical paths while maintaining compatibility with low-cost organic substrate manufacturing.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240321840A1Three-dimensional semiconductor package

Publication Date: 2024.09.26 SAMSUNG ELECTRONICS CO LTD

AI summary

A three-dimensional semiconductor package including: a package substrate having a first surface and a second surface opposite to the first surface; a first redistribution layer on the first surface of the package substrate, the first redistribution layer having a first surface and a second surface opposite to each other; a first chip on the first surface of the first redistribution layer, electrically connected to the first redistribution layer, and including first through silicon vias; first connection terminals electrically connected to one ends of the first through silicon vias; a second redistribution layer on the second surface of the package substrate, the second redistribution layer having a first surface and a second surface opposite to each other, the first surface of the second redistribution layer facing the second surface of the package substrate; and a second chip on the second surface of the second redistribution layer.