3D Package Structure With Split Signal and Power Paths
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving high integration density and efficient packaging of electronic components, particularly in reducing the size of packages while maintaining performance and reliability.
Innovation Solution
The proposed solution involves a method of forming a package structure that includes a redistribution layer (RDL) structure on a carrier, bonding a bottom die onto the RDL structure, and forming encapsulants and connectors to electrically connect multiple dies in a stacked configuration, optimizing signal and power paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If continuous reductions in minimum feature size are implemented, then integration density is improved, but package size reduction becomes more difficult
Solution Approach 1:
The patent transitions from two-dimensional planar packaging to three-dimensional stacked packaging by forming vertical interconnect structures (through-substrate vias, bump electrodes) that enable multiple dies to be stacked vertically. This dimensional change allows integration density to increase without proportionally increasing package footprint area, effectively resolving the contradiction between higher integration density and package size constraints.
Solution Approach 2:
The patent implements a stacked configuration where multiple dies are nested vertically one on top of another, with each die containing functional components and interconnect structures. This nesting approach maximizes the use of vertical space within the package, allowing high integration density while maintaining a compact package volume.
2Quantity of substance
If multiple dies are stacked vertically, then integration density is improved, but signal transmission path length increases
Solution Approach 1:
The patent forms bump electrodes and through-substrate via structures in advance during the packaging process, creating pre-established vertical interconnect pathways. These preliminary interconnect structures enable direct electrical connections between stacked dies, minimizing signal transmission path length while maintaining the benefits of vertical stacking for high integration density.
3Reliability
If complex interconnect structures are formed, then electrical connection reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent divides the interconnect structure into separate functional segments: bump electrodes formed on die surfaces, underfill material for mechanical support and stress relief, and through-substrate vias for vertical connections. This segmentation allows each component to be optimized and manufactured independently using standard processes, improving electrical connection reliability while managing manufacturing complexity through modular construction.
Data Source
AI summary
Provided are a package structure and a method of forming the same. The package structure includes a first tier, a second tier, and a third tier. The first tier includes an interposer. The second tier is disposed on the first tier and includes a bottom die. The third tier is disposed on the second tier and includes a plurality of first dies and at least one second die. The at least one second die is disposed between the plurality of first dies. The plurality of first dies are electrically connected to the bottom die by a plurality of first connectors to form a signal path, the plurality of first dies are electrically connected to the interposer by a plurality of second connectors to form a power path, and the plurality of first connectors are closer to the at least one second die than the plurality of second connectors.