3D Package Structure With Vertical Contacts for Dense Die Interconnects
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Solution Overview
Problem
Existing semiconductor packaging technologies face challenges in achieving high integration levels, reduced conductive impedance, and increased connection density while maintaining efficient transmission speeds and reducing manufacturing costs.
Innovation Solution
A package structure comprising insulation layers, routing layers, and filling structures made of silicon, with conductive bodies and insulating isolation layers, allowing for vertical integration and optimized contact structures to enhance connectivity between dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional packaging methods are used, then manufacturing cost is controlled, but integration level and connection density cannot be increased
Solution Approach 1:
The patent transitions from planar packaging to three-dimensional vertical stacking, arranging multiple dies and insulation layers along a vertical direction to achieve higher integration levels within the same footprint area
Solution Approach 2:
The patent implements a nested structure where filling structures are embedded within insulation layers, and multiple semiconductor structures are stacked within a compact package volume, maximizing space utilization
2Reliability
If conventional contact structures are used, then manufacturing process is simple, but conductive impedance is high
Solution Approach 1:
The patent employs composite contact structures comprising conductive materials embedded in insulating matrices, combining the low impedance of metals with the insulation properties of dielectric materials to achieve both electrical performance and manufacturability
3Speed
If insulation layers with large thickness are used, then manufacturing is easier, but transmission speed decreases
Solution Approach 1:
The patent optimizes the thickness parameter of insulation layers to a specific range that balances transmission speed requirements with manufacturing capabilities, using advanced deposition techniques to achieve precise thickness control
4Quantity of substance
If filling structures are added to reduce impedance, then connection density increases, but device complexity increases
Solution Approach 1:
The patent designs filling structures that simultaneously serve multiple functions: reducing conductive impedance, providing mechanical support, enabling vertical stacking, and facilitating heat dissipation, thereby increasing connection density without proportionally increasing complexity
Data Source
AI summary
Examples of the present application provide a package structure, a fabrication method thereof, and a semiconductor structure. The package structure includes a first insulation layer, a first die, a second insulation layer and a second die in sequence along a first direction, wherein the package structure further includes: a first filling structure extending through the first insulation layer along the first direction; a first contact structure extending through the first insulation layer along the first direction; and a second contact structure extending through the first filling structure, the first die and the second insulation layer along the first direction.


