3D Perpendicular Magnetic Tunnel Junctions with Vertical TFF Integration
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Solution Overview
Problem
Conventional methods for forming arrays of three-dimensional perpendicular magnetic tunnel junction (pMTJ) sensors in magnetic random access memory (MRAM) face challenges due to temperature limitations, leading to structural degradation and increased processing time, which affects the density and cost-effectiveness of non-volatile memory production.
Innovation Solution
A method involving the formation of arrays of three-dimensional structures with alternating pMTJ sensors and ohmic contact layers in a vertical direction using simple alternating thin-film deposition, allowing for high-yield production and efficient processing at lower temperatures and shorter times, with parallel connection of pMTJs and thin film transistors in all vertical levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to form arrays of three-dimensional pMTJ sensors, then the structural integrity of pMTJ sensors is maintained, but the processing time increases and production density decreases
Solution Approach 1:
The patent transitions from planar two-dimensional sensor arrays to three-dimensional vertically stacked pMTJ sensor arrays. Multiple pMTJ sensors are stacked vertically with alternating orientation (upward and downward magnetization directions), enabling higher storage density without compromising structural integrity through controlled deposition processes
Solution Approach 2:
The sensor array is segmented into multiple discrete pMTJ sensor stacks positioned at different vertical levels. Each stack is independently formed through sequential deposition cycles, allowing parallel processing and high-yield production while maintaining individual sensor integrity
2Manufacturing precision
If conventional high-temperature processing is used, then complete film deposition is achieved, but structural degradation occurs and processing time increases
Solution Approach 1:
The patent modifies processing parameters by implementing low-temperature atomic layer deposition (ALD) processes. The deposition is performed at temperatures below 200°C, which prevents thermal degradation of the pMTJ sensor structures while achieving complete and uniform film coverage through controlled precursor deposition and purification cycles
Solution Approach 2:
The patent replaces conventional thermal field-based deposition methods with chemical field-based atomic layer deposition. This substitution allows film formation at lower temperatures by utilizing surface chemistry reactions rather than thermal diffusion, thereby preventing structural degradation
3Productivity
If simple alternating thin-film deposition is used, then production cost decreases and processing time shortens, but manufacturing complexity increases
Solution Approach 1:
The patent implements continuous alternating deposition of ferromagnetic layers with upward and downward magnetization directions in a single uninterrupted ALD process cycle. This continuous process eliminates the need for separate processing steps for different sensor orientations, reducing overall manufacturing complexity while maintaining high productivity
Solution Approach 2:
The ALD deposition process is designed to perform multiple functions simultaneously: it deposits ferromagnetic material, controls magnetization orientation through deposition sequence, and forms uniform thin films across the entire array. This multi-functionality reduces the number of separate processing steps required
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of high-density bit/cell memory devices with reduced production costs and minimizes structural defects, while maintaining the integrity of pMTJ sensors, thus enhancing the efficiency and reliability of MRAM technology.
Implementation Method 1
The switching of the MTJ element between high and low resistance states results from electron spin transfer. Each electron has a spin orientation. Generally, electrons flowing through a conductive material have random spin orientations with no net spin orientation. However, when electrons flow through a magnetized layer, the spin orientations of the electrons become aligned so that there is a net aligned orientation of electrons flowing through the magnetic layer
Implementation Method 2
When the orientations of the magnetizations of the free layer and the reference layer are oriented in the same direction, the spin of the electrons in the free layer are generally in the same direction as the orientation of the spin of the electrons in the reference layer. Because these electron spins are generally in the same direction, the electrons may pass relatively easily through the tunnel barrier layer. However, if the orientations of the magnetizations of the free layer and the reference layer are opposite to one another, the spin of electrons in the free layer will generally be opposite to the spin of electrons in the reference layer. In this case, electrons do not easily pass through the barrier layer, resulting in a higher electrical resistance through the MTJ stack
Data Source
AI summary
According to one embodiment, a method of forming a magnetic memory device includes forming a source region including a first semiconductor material having a first conductivity above a substrate, forming an array of three-dimensional (3D) structures above the substrate, depositing a channel material on a surface of at least one sidewall of each 3D structure, depositing a gate dielectric material on the channel material on the surface of at least one sidewall of each 3D structure, forming a first isolation region in the cavity region above the substrate, forming a first gate region above the first isolation region in the cavity region, and forming a second isolation region above the first gate region, wherein a nth gate region is formed above a (n+1) isolation region thereafter until a top of the array of 3D structures, wherein each nth gate region is coupled to each nth perpendicular magnetic tunnel junction sensor of each 3D structure.