3D Power Combiner Stacking for Compact Millimeter-Wave IC Packages

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Solution Overview

Problem

As wireless communication devices operate at higher frequencies such as millimeter wave and sub-Terahertz ranges, the output power of semiconductor devices decreases, leading to a need for compact power combiners to enhance signal strength, while conventional two-dimensional power combiners occupy significant space and increase die size and cost, especially in phased array systems where multiple combiners are required.

Innovation Solution

The implementation of three-dimensional power combiners, where multiple dies are stacked to form different branches of a power combiner, using direct bonding interconnects to reduce impedance discontinuity and enable compact form factors, allowing for efficient utilization of space and reduced size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional two-dimensional power combiners are used, then the device can perform power combining function, but the die size and cost increase significantly

Engineering Contradiction:
Improvepower combining capabilityVSAvoiddie size
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The patent transitions from conventional two-dimensional planar layouts to three-dimensional stacked architectures. Multiple power combiner branches are formed by stacking dies vertically, where each die contains a portion of the transmission lines. This vertical stacking enables power combining functionality while significantly reducing the horizontal die footprint, directly resolving the contradiction between maintaining power combining capability and reducing die size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Power

If multiple power combiners are used in phased array systems, then the signal strength is enhanced, but the overall device complexity and cost increase

Engineering Contradiction:
Improvesignal strengthVSAvoidsystem complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent integrates multiple power combiner functions into a single stacked die assembly. Instead of using separate discrete power combiner devices that would increase system complexity, the invention merges multiple combiner branches into one unified three-dimensional structure. Each branch is formed by transmission lines on different stacked dies, allowing multiple combiner operations to coexist in a single integrated component, thereby enhancing signal strength while reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If transmission lines are routed on the same plane, then the layout is simple, but the impedance discontinuity increases

Engineering Contradiction:
Improvelayout simplicityVSAvoidimpedance matching
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent moves transmission lines from a two-dimensional coplanar arrangement to a three-dimensional stacked configuration. Transmission lines on different stacked dies are vertically aligned and coupled through interconnect structures, creating overlapping conductive paths. This vertical stacking with overlapping projections reduces impedance discontinuity by providing multiple coupled transmission paths, thereby improving impedance matching while maintaining layout simplicity through the regular stacked architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240322775A1Three-dimensional power combiners
Publication Date: 2024.09.26 INTEL CORP
  • US20240322775A1 patent drawing
  • US20240322775A1 patent drawing
  • US20240322775A1 patent drawing

AI summary

Disclosed herein are electronic assemblies, integrated circuit (IC) packages, and communication devices implementing three-dimensional power combiners. An electronic assembly may include a first die, comprising a first transmission line, and a second die, comprising a second transmission line. Each die includes a first face and an opposing second face, and the second die is stacked above the first die so that the first face of the second die is coupled to the second face of the first die. The electronic assembly further includes a first conductive pathway between one end of the first transmission line and a first connection point at the first face of the first die, a second conductive pathway between one end of the second transmission line and a second connection point at the first face of the first die, and a third conductive pathway between the other ends of the first and second transmission lines.