3D Predicate Mask for Arbitrary Matrix Multiplication

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Solution Overview

Problem

Current matrix multiplication instructions in processors are inefficient for arbitrary matrix sizes, requiring multiple instructions or large predicate masks, which leads to performance degradation for smaller matrix calculations and impracticality in supporting all source matrix configurations.

Innovation Solution

A 3D predicate mask with an M-bit row mask, an N-bit column mask, and a K-bit rank mask is used to enable efficient matrix multiplication for matrices of arbitrary sizes, reducing the number of required predicate bits from O(N^3) to O(K+N^2) and allowing single instructions to support multiple rank updates and arbitrary source matrix configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional matrix multiplication instructions are used for arbitrary matrix sizes, then all matrix configurations can be supported, but the number of predicate bits required becomes O(N^3) which is impractical

Engineering Contradiction:
Improvesupport for arbitrary matrix configurationsVSAvoidnumber of predicate bits
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the traditional 2D predicate mask into three independent 1D masks: row mask (M bits), column mask (N bits), and rank mask (K bits). This segmentation reduces the total predicate bits from O(N^3) to O(M+N+K), making arbitrary matrix size support practical while maintaining versatility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a 2D predicate mask approach to a 3D predicate mask approach by adding the rank dimension. This dimensional change allows the system to handle arbitrary matrix configurations efficiently by independently controlling rows, columns, and ranks through separate mask bits.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If multiple instructions or high-level routines are used to handle arbitrary matrix sizes, then all matrix configurations can be supported, but processing efficiency and throughput decrease

Engineering Contradiction:
Improvesupport for arbitrary matrix sizesVSAvoidprocessing efficiency and throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent creates a universal matrix multiplication instruction that can handle any matrix configuration (different M, N, K values) through the 3D predicate mask mechanism. This single instruction replaces multiple specialized instructions or high-level routines, maintaining both versatility and processing efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent enables arbitrary matrix size support by allowing dynamic parameter changes through the predicate masks. The row mask, column mask, and rank mask can be independently configured to match any matrix dimensions, allowing a single instruction to adapt to different matrix sizes without requiring multiple fixed-size instructions.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If a single instruction supports multiple rank updates and arbitrary matrix configurations, then processing efficiency improves, but the instruction complexity increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidinstruction complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the control mechanism into three independent mask components (row mask, column mask, rank mask), each handling a specific dimension. This segmentation simplifies the instruction complexity by allowing independent configuration of each dimension rather than requiring complex interdependent control logic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The 3D predicate mask acts as an intermediary between the single matrix multiplication instruction and the arbitrary matrix configurations. It mediates the complexity by providing a structured interface (three independent masks) that translates diverse matrix size requirements into unified instruction execution.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11182458B2Three-dimensional lane predication for matrix operations
Publication Date: 2021.11.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11182458B2 patent drawing
  • US11182458B2 patent drawing
  • US11182458B2 patent drawing

AI summary

Embodiments of the present invention are directed to a new instruction set extension and a method for providing 3D lane predication for matrix operations. In a non-limiting embodiment of the invention, a first input matrix having m rows and k columns and a second input matrix having k rows and n columns are received by a compute array of a processor. A three-dimensional predicate mask having an M-bit row mask, an N-bit column mask, and a K-bit rank mask is generated. A result matrix of up to m rows, up to n columns, and up to k rank updates is determined based on the first input matrix, the second input matrix, and the predicate mask.