3D-Printed Antenna Package Substrate With Embedded Interconnects
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Solution Overview
Problem
The semiconductor packaging industry faces high costs due to complex interconnection processes, and existing facilities struggle to produce customized semiconductor chips for diverse applications such as IT, AI, vehicles, and smart factories.
Innovation Solution
The use of 3D printing technology to simplify interconnection processes by forming customized interconnection structures directly on substrates, optimizing costs by eliminating separate interconnection processes and enabling the creation of substrates with specific shapes and patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor packaging processes are used with separate interconnection processes, then electrical connection between semiconductor parts is achieved, but costs of interconnection processes occupy most of the costs of semiconductor packaging and increase sharply as structure becomes complicated
Solution Approach 1:
The patent merges the substrate formation process and interconnection structure formation process into a single 3D printing operation. The support structure is printed with embedded conductive materials or conductive ink, allowing interconnection structures to be formed simultaneously with the substrate rather than as separate subsequent steps. This integration eliminates multiple fabrication steps and reduces overall manufacturing cost while maintaining electrical connection functionality.
Solution Approach 2:
The support structure serves multiple functions: it provides mechanical support during printing, defines the interconnection geometry, and contains embedded conductive elements that form the electrical pathways. This multi-functionality eliminates the need for separate interconnection fabrication processes, reducing both complexity and cost while achieving the required electrical connections between semiconductor components.
2Adaptability or versatility
If conventional semiconductor production facilities are used, then standard semiconductor packaging is produced, but it is difficult to solve customized semiconductor chips for diverse applications
Solution Approach 1:
The 3D printing process allows easy modification of printing parameters (conductive material distribution, support structure geometry, interconnection patterns) to accommodate different customization requirements. By changing digital design parameters rather than physical tooling, the system can rapidly adapt to produce customized semiconductor packages for different applications without requiring complex reconfiguration of production facilities.
Solution Approach 2:
The patent replaces complex mechanical interconnection fabrication equipment with a 3D printing system that uses digital design files to directly create customized interconnection structures. This substitution of mechanical fabrication systems with additive manufacturing technology enables flexible customization while simplifying the overall production facility requirements.
3Manufacturing precision
If multiple separate processes are used for substrate formation and interconnection structure formation, then each process can be optimized independently, but the overall process complexity and cost increase
Solution Approach 1:
The patent combines substrate formation and interconnection structure formation into a single 3D printing process. The support structure is printed with embedded conductive materials or conductive ink, allowing interconnection structures to be formed simultaneously with the substrate rather than as separate subsequent steps. This integration eliminates multiple fabrication steps and reduces overall manufacturing cost while maintaining electrical connection functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the cost of interconnection processes, enhances the flexibility to produce customized semiconductor packaging, and improves the efficiency of semiconductor packaging processes by integrating interconnection structures directly into the substrate formation.
Implementation Method 1
forming an interconnection structure inside a substrate formed based on three-dimensional (3D) printing
Implementation Method 2
a polymer and an oligomer in combination with a specific monomer may be used
Data Source
AI summary
According to various embodiments, a substrate for electrical connection between electronic components may include: a body having a single layer structure; and at least one interconnect having a conductivity formed inside the body, wherein the at least one interconnect includes one side and the other side exposed to the outside of the body, and a line connecting the one side and the other side, and wherein the line is crossed in a transverse direction or a longitudinal direction through the inside of the body of the single layer structure, and may be implemented to have a specific curvature in some sections. Other various embodiments are possible.