3D-Printed Semiconductor Substrate With Integrated Interconnects
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Solution Overview
Problem
The semiconductor packaging industry faces high costs due to complex interconnection processes, and existing facilities struggle to produce customized semiconductor chips for diverse applications such as IT, AI, vehicles, and smart factories.
Innovation Solution
The use of 3D printing technology for customized semiconductor packaging allows for the simplification of interconnection processes, reduction of costs, and creation of substrates with specific shapes and interconnection structures, thereby optimizing process costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional interconnection processes are used for semiconductor packaging, then electrical connection between semiconductor parts is achieved, but costs of interconnection processes occupy most of the costs of semiconductor packaging and increase sharply as structure becomes complicated
Solution Approach 1:
The patent combines the substrate formation process and interconnection structure formation process into a single 3D printing operation. The support structure is printed integrally with the substrate, eliminating the need for separate interconnection processes. This merging of processes reduces manufacturing complexity and cost while maintaining electrical connection functionality.
Solution Approach 2:
The support structure serves multiple functions: it provides mechanical support during printing, forms the substrate body, and creates the interconnection structures. This multi-functionality eliminates the need for separate components and processes for each function, reducing overall manufacturing cost and complexity.
2Adaptability or versatility
If conventional semiconductor production facilities are used, then standard semiconductor chips are produced, but it is difficult to produce customized semiconductor chips for diverse applications
Solution Approach 1:
The 3D printing process allows for easy modification of design parameters such as substrate shape, interconnection patterns, and support structure geometry through digital model updates. This enables customization for different applications (IT, AI, vehicles, smart factories) without requiring changes to physical facilities or complex retooling.
Solution Approach 2:
The patent transitions from conventional 2D planar interconnection structures to 3D volumetric interconnection structures. The support structure extends in the vertical dimension, allowing for complex interconnection patterns and customized geometries that cannot be achieved with traditional planar packaging methods.
3Ease of manufacture
If 3D printing is used to form interconnection structures, then separate interconnection processes are eliminated and costs are reduced, but manufacturing precision must be maintained
Solution Approach 1:
The support structure acts as an intermediary element that is printed first to define the substrate geometry and interconnection pathways. After metallization, the support structure can be selectively removed to create through-holes or channels, allowing for precise interconnection formation without requiring high-precision direct printing of the conductive paths themselves.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
3D printing-based semiconductor packaging reduces costs and enhances process efficiency by eliminating separate interconnection processes and enabling the production of customized chip packages with improved electrical connection density and resolution.
Implementation Method 1
a photoinitiator; or a cured product thereof. The material may have a dielectric constant of 2.5 to 3.0, a CTE of 10 ppm/°C. or more and 20 ppm/°C. or less, and may have a resolution in units of μm
Data Source
AI summary
According to various embodiments, a substrate for electrical connection between electronic components may include: a body having a single layer structure; and at least one interconnect having a conductivity formed inside the body, wherein the at least one interconnect includes one side and the other side exposed to the outside of the body, and a line connecting the one side and the other side, and wherein the line is crossed in a transverse direction or a longitudinal direction through the inside of the body of the single layer structure, and may be implemented to have a specific curvature in some sections. Other various embodiments are possible.