3D-Printed Semiconductor Substrate With Sloped Through-Interconnects
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Solution Overview
Problem
The semiconductor packaging industry faces high costs due to complex interconnection processes, and existing facilities struggle to produce customized semiconductor chips for diverse applications such as IT, AI, vehicles, and smart factories.
Innovation Solution
The implementation of 3D printing technology for customized semiconductor packaging allows for the simplification of interconnection processes, reduction of costs, and creation of substrates with specific shapes and interconnection structures, thereby optimizing process costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional interconnection processes are used in semiconductor packaging, then electrical connection between semiconductor parts is achieved, but costs of interconnection processes occupy most of the costs of semiconductor packaging and increase sharply as structure becomes complicated
Solution Approach 1:
The patent combines the substrate structure and interconnection structures into a single integrated component manufactured by 3D printing. The substrate includes through-holes with conductive material formed directly during the 3D printing process, eliminating the need for separate interconnection processes such as drilling, plating, and wiring that are required in conventional semiconductor packaging. This merging of functions reduces both cost and manufacturing steps while maintaining electrical connection reliability.
Solution Approach 2:
The patent changes the manufacturing method from conventional multi-step processes to 3D printing technology. This parameter change enables direct formation of complex interconnection structures with precise control over geometry, position, and conductivity. The 3D printing process allows for variable interconnection paths and configurations that can be optimized for electrical performance while reducing material waste and process complexity compared to traditional methods.
2Adaptability or versatility
If conventional semiconductor production facilities are used, then standard semiconductor chips are produced, but it is difficult to solve customized semiconductor chip demands for diverse applications
Solution Approach 1:
The patent enables dynamic customization of semiconductor packaging by using 3D printing technology that can rapidly reconfigure manufacturing parameters for different designs. The system can adapt to various substrate shapes, sizes, interconnection patterns, and material compositions without requiring complex facility reconfiguration. Digital models can be easily modified to meet specific application requirements for IT, AI, vehicles, smart factories, and other diverse fields, providing high adaptability while keeping facility complexity low.
Solution Approach 2:
The 3D printing-based manufacturing system serves multiple functions: it can produce substrates, form interconnection structures, create through-holes, and integrate various materials all within a single platform. This universal manufacturing capability allows the same facility to produce customized semiconductor packages for different applications without requiring specialized equipment for each product type, thereby enhancing versatility while avoiding increased facility complexity.
3Ease of manufacture
If simple single layer substrate structure is used, then manufacturing is simplified, but electrical connection efficiency and flexibility are limited
Solution Approach 1:
The patent utilizes the third dimension by forming vertical through-holes that penetrate the substrate thickness direction. These through-holes provide direct electrical connection paths between opposite surfaces of the substrate, enabling efficient interlayer connectivity without requiring complex multi-layer routing. The 3D printing process naturally accommodates this dimensional approach by extruding conductive material through the substrate thickness, achieving high electrical connection efficiency while maintaining manufacturing simplicity through the additive process.
Solution Approach 2:
The patent nests conductive material within the substrate structure by forming conductive cores inside through-holes. The conductive material is embedded within the dielectric substrate matrix during the 3D printing process, creating a nested configuration where the conductive element is surrounded by the insulating material. This nested structure provides efficient electrical connection while maintaining the simplicity of a single integrated manufacturing step.
Data Source
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AI summary
A semiconductor packaging module comprises a single first semiconductor chip, and a substrate including a first surface facing a lower surface of the first semiconductor chip, a second surface facing the first surface, and at least one first interconnect structure inside between the first surface and the second surface, wherein the at least one first interconnect structure comprises a first portion exposed through the first surface, a second portion exposed through the second surface, and a line connecting between the first portion and the second portion, wherein the first portion is electrically connected to the first semiconductor chip, and the second portion is electrically connectable to another electronic component, and wherein the line is transverse to the body of the single layer structure, and is formed with a specific slope in at least some sections.