3D Reconstruction Cache for Shared Pixel Reuse

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Solution Overview

Problem

Existing graphics processing systems face high memory access latency and inefficient use of memory and compute power due to repeated fetching and storing of shared pixels during 3D reconstruction processes, particularly in wireless communication and handheld devices.

Innovation Solution

Implement a 3D reconstruction cache scheme that reduces the need for fetching and storing shared pixels by reusing depth/color values and efficiently managing pixel tiles in a cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If pixels are repeatedly fetched and stored during 3D reconstruction, then the reconstruction process can be completed, but memory access latency increases and memory bandwidth is wasted

Engineering Contradiction:
Improve3D reconstruction processing speedVSAvoidmemory access latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements a cache mechanism that pre-loads and stores pixel data (depth and color values) before they are needed for 3D reconstruction. By anticipating future access needs and preparing data in advance, the system reduces memory access latency when the same pixels are needed again during the reconstruction process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates cached copies of pixel data from the original frame buffer. These copies are stored in a dedicated cache structure with pixel tiles organized for efficient access during 3D reconstruction. By using copies instead of repeatedly accessing the original memory, the system eliminates redundant memory transfers and reduces access latency.

Inventive Principle:
Principle #26Copying

2Productivity

If shared pixels are repeatedly fetched and stored, then 3D reconstruction can be performed, but compute power is wasted on redundant operations

Engineering Contradiction:
Improve3D reconstruction processing throughputVSAvoidcompute power consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent creates cached copies of pixel data that can be reused multiple times during 3D reconstruction. By storing these copies in a dedicated cache structure, the system avoids redundant computation and data processing operations, thereby reducing compute power consumption while maintaining reconstruction throughput.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent implements a cache management system that identifies and discards redundant pixel data that has already been processed and stored. By detecting when pixels have been previously fetched and stored, the system recovers computational resources by avoiding duplicate operations on the same data.

Inventive Principle:
Principle #34Discarding and recovering

3Ease of operation

If pixel data is stored in traditional memory during 3D reconstruction, then data can be accessed, but memory bandwidth is consumed by redundant transfers

Engineering Contradiction:
Improvepixel data accessibilityVSAvoidmemory bandwidth consumption
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent creates local cached copies of pixel data that can be accessed directly during 3D reconstruction without repeatedly transferring data from main memory. This copying approach maintains full data accessibility while eliminating redundant memory bandwidth consumption by keeping frequently accessed pixel tiles in a dedicated cache structure.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12592022B2Integration cache for three-dimensional (3D) reconstruction
Publication Date: 2026.03.31 QUALCOMM INC
  • US12592022B2 patent drawing
  • US12592022B2 patent drawing
  • US12592022B2 patent drawing

AI summary

Aspects presented herein relate to methods and devices for data or graphics processing including an apparatus, e.g., a central processing unit (CPU). The apparatus may partition at least one frame into a set of two-dimensional (2D) pixel tiles, wherein the at least one frame is associated with a three-dimensional (3D) reconstruction (3DR) process. The apparatus may also detect whether one or more 2D pixel tiles in the set of 2D pixel tiles are present in a cache. Further, the apparatus may obtain an indication of at least one pixel in the one or more 2D pixel tiles based on the one or more 2D pixel tiles being present in the cache.