3D RF Circuit Packaging With Stacked High-Q Inductors
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Solution Overview
Problem
Conventional 2D packaging technologies for RF circuits limit size reduction and RF performance due to the sharing of a single substrate, making it difficult to implement high Q inductors and requiring expensive real estate on module boards.
Innovation Solution
The use of 3D stackable substrates with low dielectric materials and strategically partitioned components, where high impedance functions are placed on a top substrate with a low dielectric overmold and low impedance components on a bottom substrate, allowing for high Q inductor construction and minimizing z-axis connections to reduce size and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If all components are placed on a single substrate in conventional 2D packaging, then the circuit board area is reduced, but RF performance deteriorates due to inability to provide different impedance and dielectric properties for different components
Solution Approach 1:
The patent transitions from 2D single-substrate packaging to 3D multi-substrate stacking, utilizing the vertical dimension to accommodate components with different RF requirements. Multiple substrates are stacked with air gaps between them, allowing each substrate to be optimized for specific impedance and dielectric properties without compromising overall circuit board area efficiency.
Solution Approach 2:
The circuit is divided into multiple portions placed on separate substrates according to their RF performance requirements. Critical RF components requiring specific impedance characteristics are segmented and placed on substrates optimized for those properties, while less critical components are placed on other substrates, allowing each segment to operate at optimal performance.
2Reliability
If high Q inductors are implemented in conventional 2D packaging, then RF performance improves, but circuit board area increases due to limited space for optimal inductor placement and configuration
Solution Approach 1:
Inductors are configured to extend vertically across multiple substrates in the 3D stack, utilizing the z-dimension to increase effective inductor area and improve Q factor without increasing the footprint on any single substrate. The air gaps between substrates are incorporated into the inductor structure to enhance performance.
Solution Approach 2:
Inductor structures are nested across multiple substrate layers, with conductive elements on different substrates forming continuous or coupled inductor paths. This nesting approach allows the inductor to utilize space throughout the 3D stack rather than being confined to a single substrate plane.
3Length of stationary object
If substrates are placed close together to minimize module height, then packaging compactness improves, but high impedance functions and components cannot be properly facilitated
Solution Approach 1:
Air gaps of specific dimensions are introduced at localized positions between substrates where high impedance functions are required. The gap size and position are optimized locally to provide the necessary impedance characteristics for specific RF components, while other regions of the module maintain compact spacing to minimize overall height.
4Reliability
If critical RF functions are placed on substrates far from access points for ease of tuning, then RF performance improves, but interconnect length and signal loss increase
Solution Approach 1:
Critical RF functions are placed on substrates positioned for optimal access and tuning in the 3D stack, while interconnects between substrates are minimized through vertical stacking and direct coupling. The z-dimension is utilized to reduce the number of inter-substrate connections required, thereby reducing cumulative signal loss compared to 2D layouts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the size and cost of module boards, enhances RF performance by enabling high Q inductors and better thermal dissipation, and simplifies circuit tuning, while minimizing interconnect losses and part count.
Implementation Method 1
The first substrate may be comprised of low dielectric material and the distance between the first and the second substrate may be sufficiently large to facilitate high impedance functions and components
Implementation Method 2
printing inductors on the first substrate thereby enabling them to be high Q inductors and printed spiral arms may be stacked vertically on both the top and bottom surface of the first substrate thereby creating high Q inductors
Data Source
AI summary
An embodiment of the present invention provides an apparatus, comprising an integrated circuit, wherein a first portion of the integrated circuit is placed on a top tier substrate and a second portion of the integrated circuit is placed on a bottom tier substrate stacked adjacent the top tier substrate and wherein the first portion and the second portion of the integrated circuit are interconnected; and printed spiral arms stacked vertically on both the top and bottom surface of the top tier substrate thereby creating high Q inductors.