3D RF Electronic-Photonic IC With Optical RF Interconnects

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Solution Overview

Problem

Current RF PICs are limited by 2D planar systems, leading to increased power loss, heat dissipation, and system complexity due to electrical interconnections, with a lack of compact, high-gain antenna integration and efficient wireless communication capabilities.

Innovation Solution

Development of RF 3D EPIC chips with integrated antennas and RF transceiver circuitry, utilizing optical cross-connect switches for wireless communication, enabling optical RF signaling and vertical integration of RF PIC layers with 3D EPICs to reduce electromagnetic interference and enhance compactness and power efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If 2D planar systems are used for RF PICs, then manufacturing is simpler, but power loss increases and heat dissipation worsens

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidpower loss
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent transitions from 2D planar RF PIC architecture to a 3D integrated architecture by stacking multiple functional layers vertically. This dimensional change enables shorter interconnect paths, reduced parasitic effects, and improved power efficiency while maintaining manufacturability through standard semiconductor fabrication processes extended to three dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If electrical interconnections are used in RF PICs, then signal transmission is achieved, but electromagnetic interference increases and power efficiency decreases

Engineering Contradiction:
Improvesignal transmissionVSAvoidelectromagnetic interference
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent introduces photonic interconnects as an intermediary between RF circuits, converting electrical signals to optical signals for transmission between layers. This intermediary approach eliminates electromagnetic interference associated with traditional electrical interconnections while maintaining high-speed signal transmission capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If antennas are integrated on-chip, then device compactness improves, but antenna gain decreases

Engineering Contradiction:
Improvedevice footprintVSAvoidantenna gain
Core Design Contradiction:
Area of stationary objectVSPower

Solution Approach 1:

The patent employs 3D stacked antenna arrays with multiple antenna elements distributed across different vertical layers. This three-dimensional configuration enables compact on-chip integration while achieving high gain through constructive interference and beam forming capabilities inherent to phased array structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent integrates multiple functional components including antennas, photonic devices, and RF circuits within a compact stacked architecture where layers are nested vertically. This nesting approach achieves high device density while maintaining adequate space for high-performance antenna elements.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Loss of time

If vertical stacking of IC dies is implemented, then interconnect delay is reduced, but device complexity increases

Engineering Contradiction:
Improveinterconnect delayVSAvoidintegration complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the RF PIC functionality into distinct modular layers including RF front-end circuits, photonic interconnect layers, and antenna arrays. Each layer performs specific functions and can be independently optimized and manufactured, then integrated through standardized interfaces, reducing overall system complexity despite the 3D architecture.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Facilitates high-gain, low-power wireless chip-to-chip communication with reduced electromagnetic interference, supporting advanced beam forming and scalability, while maintaining compatibility with CMOS technology and existing cooling solutions.

Implementation Method 1

utilizing optical cross-connect switches for wireless communication, enabling optical RF signaling

Methodology Applied
Scientific EffectOptical RF signaling:

Implementation Method 2

at least one RF antenna... Facilitates high-gain, low-power wireless chip-to-chip communication

Methodology Applied
Scientific EffectRadio-frequency electromagnetic radiation:

Implementation Method 3

an optical fiber or waveguide coupling the optical interface of the RF PIC to the EPIC

Methodology Applied
Scientific EffectOptical signal transmission: Optical Fibre

Data Source

PatentEP3669420B1Radio-frequency three-dimensional electronic-photonic integrated circuit with integrated antennas and transceivers
Publication Date: 2025.10.01 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • EP3669420B1 patent drawingFigure 1
  • EP3669420B1 patent drawingFigure 2
  • EP3669420B1 patent drawingFigure 3

AI summary

A radio-frequency three-dimensional electronic-photonic integrated circuit (RF 3D EPIC) comprises a radio-frequency (RF) photonic integrated circuit (PIC) layer, the RF PIC layer comprising, in a single integrated circuit, at least one RF antenna and at least one photonic device coupling the RF antenna to an optical interface, and further comprises an electronic-photonic integrated circuit (EPIC) assembly optically coupled to the optical interface of the RF PIC layer, the EPIC assembly comprising two or more integrated-circuit dies bonded to one another so as to form a die stack, wherein at least one of the two or more integrated-circuit dies comprises one or more integrated photonic devices and wherein each of the two or more integrated-circuit dies is electrically connected to at least one other integrated-circuit die via an electrically conductive through-wafer interconnect or an electrically conductive through-wafer via.