3D Metal Routing Layout for Vertical Channel Transistor Density
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to achieve high-density 3D metal routing for vertical channel 3D transistor devices, which is essential for overcoming scaling limitations in single-digit nanometer semiconductor fabrication nodes.
Innovation Solution
The method involves forming a first layer stack on a substrate with alternating layers of metal and dielectric materials, creating vertical channel structures through epitaxial growth, and optimizing metal routing path lengths by forming metal openings and filling them with a second metal, allowing for high-density routing around 90-degree angles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If 3D metal routing is implemented for vertical channel 3D transistor devices, then device density and performance are improved, but manufacturing complexity increases
Solution Approach 1:
The patent transitions from traditional 2D planar metal routing to 3D vertical metal routing by forming metal structures that extend vertically through multiple layers and horizontally around 90-degree angles. This dimensional change enables higher device density by utilizing the third dimension for routing paths, allowing metal to access contacts at various vertical levels and radial positions simultaneously
Solution Approach 2:
The metal routing is divided into multiple discrete metal structures, each serving specific routing functions. The first metal layer provides initial routing paths, while the second metal fills openings to create additional routing segments. This segmentation allows independent optimization of each metal layer's routing paths, managing manufacturing complexity through modular construction
2Speed
If metal routing path lengths are optimized for higher device speed, then performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies different metal materials and routing configurations to different regions of the device. The first metal and second metal are used in different regions, with each material selected for its specific electrical properties. This local quality approach allows optimization of routing path lengths and electrical performance in critical regions while maintaining manufacturability in other areas
Solution Approach 2:
The first metal layer and its associated openings are formed before the second metal is deposited. This preliminary action establishes the initial routing framework, allowing subsequent second metal routing to be planned and executed with reference to the already-formed first metal structures, thereby optimizing overall path lengths while managing precision requirements through staged manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables higher device performance and speed by optimizing metal routing path lengths, while also allowing for the production of higher density circuits at a reduced cost.
Implementation Method 1
the vertical channel structures formed by epitaxial growth, the vertical channel structures having a current flow path that is perpendicular to a surface of the substrate
Implementation Method 2
isotropically removing accessible portions of the first dielectric material through the metal openings, and filling the metal openings with a second metal resulting in second metal structures that extend horizontally from the vertical channel structures
Data Source
AI summary
A method of microfabrication includes epitaxially growing a first vertical channel structure of silicon-containing material on a first sacrificial layer of silicon containing material, the first sacrificial layer having etch selectivity with respect to the vertical channel structure. A core opening is directionally etched through the vertical channel structure to expose the first sacrificial layer, and the first sacrificial layer is isotropically etched through the core opening to form a first isolation opening for isolating the first vertical channel structure.