3D Semiconductor Power Grids with Vertical Liquid Cooling
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Solution Overview
Problem
Three-dimensional integrated circuits (3D-ICs) face significant challenges in heat removal due to increased power density and high thermal resistance, particularly in stacked configurations where heat transfer from semiconductor layers to heat sinks is inefficient, often exacerbated by the poor heat spreading properties of insulating materials like silicon dioxide in shallow trench isolation regions.
Innovation Solution
The implementation of thermally conductive materials and structures, such as thermally conductive shallow trench isolation regions, pre-metal dielectric regions, etch stop layers, and thermal contacts, is used to enhance heat transfer within 3D-ICs. These include the integration of heat spreaders, thermally conductive shallow trench isolation, and thermally conductive etch stop layers, as well as the strategic placement of thermal contacts to reduce thermal resistance and improve heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple layers of transistors are stacked in 3D configuration, then transistor density and performance are improved, but heat removal becomes significantly more difficult due to increased power density and thermal resistance
Solution Approach 1:
The patent introduces liquid cooling channels that extend vertically through the stacked transistor layers, utilizing the third dimension (vertical direction) to extract heat. This allows heat removal paths to be established in the vertical dimension rather than relying solely on horizontal heat spreading, effectively addressing the thermal management challenge in 3D stacked configurations.
Solution Approach 2:
The patent employs liquid coolant as an intermediary substance that flows through the cooling channels to transfer heat away from the transistor layers. The liquid medium acts as a thermal conduit, absorbing heat from the high-density transistor regions and transporting it to external heat sinks, thereby resolving the heat removal inefficiency in stacked configurations.
2Reliability
If insulating materials like silicon dioxide are used in shallow trench isolation regions, then electrical isolation is improved, but heat spreading capability deteriorates
Solution Approach 1:
The patent applies different material properties to different regions: electrical insulation is maintained in the horizontal plane through silicon dioxide isolation layers, while vertical heat transfer is enhanced through thermally conductive cooling channels. This local differentiation of material functions allows simultaneous achievement of electrical isolation and effective heat removal.
Solution Approach 2:
The patent employs a composite structure combining electrical insulating materials (silicon dioxide) with thermally conductive materials (cooling channels filled with liquid or thermally conductive solids). This composite approach allows the system to simultaneously achieve electrical isolation in the horizontal direction while enabling efficient heat transfer in the vertical direction through the thermally conductive pathways.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces thermal resistance and enhances heat removal from 3D-ICs by utilizing materials with higher thermal conductivity, ensuring that heat can be efficiently transferred from semiconductor layers to heat sinks, thereby maintaining desirable temperature levels and improving the overall thermal management of 3D-ICs.
Implementation Method 1
The implementation of thermally conductive materials and structures, such as thermally conductive shallow trench isolation regions, pre-metal dielectric regions, etch stop layers, and thermal contacts, is used to enhance heat transfer within 3D-ICs
Implementation Method 2
These include the integration of heat spreaders, thermally conductive shallow trench isolation, and thermally conductive etch stop layers, as well as the strategic placement of thermal contacts to reduce thermal resistance and improve heat dissipation
Data Source
AI summary
A method for producing a 3D semiconductor device: providing a first level with a first single crystal layer; forming control circuitry of first transistors in and/or on the first level with a first metal layer above; forming a second metal layer above the first metal layer; forming a third metal layer above the second metal layer; forming at least one second level on top of or above the third metal layer; performing additional processing steps to form a plurality of second transistors within the second level; forming a fourth and fifth metal layers above second level; a global power distribution grid includes fifth metal, and local power distribution grid includes the second metal layer, where the fifth metal layer thickness is at least 50% greater than the second metal layer thickness.