3D Semiconductor Stack Layout for Stable High-Density DRAM
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Solution Overview
Problem
The miniaturization of semiconductor devices is limited by the fixed planar size of substrates, which restricts the further improvement of memory integration in dynamic random access memory (DRAM) structures.
Innovation Solution
A method for manufacturing a semiconductor structure involves forming a stacked structure with alternating first and second semiconductor layers, etching to create specific sub-parts, and filling gaps with a dielectric layer to enhance stability and prevent collapse, allowing for improved integration without compromising contact reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the planar size of the substrate is increased to improve memory capacity and integration, then the memory capacity can be improved, but the substrate area and device complexity increase
Solution Approach 1:
The patent transitions from planar 2D memory structure to 3D stacked structure by forming alternating semiconductor layers (first and second semiconductor layers) stacked vertically on the substrate. This vertical stacking enables multiple memory cells to occupy the same footprint area, dramatically increasing memory capacity without proportionally increasing substrate area.
Solution Approach 2:
The memory structure is segmented into alternating first semiconductor layers and second semiconductor layers, with each layer containing conductive lines and insulating layers. This segmentation allows independent formation and optimization of each layer, enabling high-density 3D stacking while maintaining manufacturing feasibility.
2Quantity of substance
If the stacked structure is etched to form sub-parts in different directions to improve integration, then the integration density increases, but the structural stability may deteriorate causing collapse and fracture
Solution Approach 1:
Insulating layers are introduced as intermediary materials between the first and second semiconductor layers. These insulating layers fill the gaps and provide mechanical support to the etched sub-parts, preventing collapse and fracture while maintaining the high integration density achieved through directional etching.
Solution Approach 2:
The stacked structure employs composite materials consisting of alternating semiconductor layers and insulating layers. This composite structure combines the electrical functionality of semiconductor materials with the mechanical support properties of insulating materials, achieving both high integration density and structural stability.
Data Source
AI summary
A method includes: providing a substrate including a first region and a second region; a stacked structure being formed on the substrate, the stacked structure including a first semiconductor layers and a second semiconductor layers stacked alternately in sequence along a direction perpendicular to a plane where the substrate is located; etching the stacked structure, such that the first semiconductor layers and the second semiconductor layers located in the second region respectively form a first sub-part extending in a first direction and a third sub-part extending in the first direction; the first semiconductor layers and the second semiconductor layers remaining in the first region respectively constitute a second sub-part extending in a second direction and a fourth sub-part extending in the second direction; removing the third sub-part; and forming a first dielectric layer at least filling a gap between two adjacent ones of the first sub-parts.