3D Semiconductor Structure With Reprogrammable TSV Logic
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Solution Overview
Problem
Existing semiconductor fabrication methods face high mask-set costs and low flexibility, limiting the production of diverse logic families and integrated circuits with varying functionalities.
Innovation Solution
The use of a re-programmable antifuse in conjunction with Through Silicon Via (TSV) to construct configurable logic devices, allowing for the creation of modular, customizable integrated circuits with reduced mask costs and enhanced flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing semiconductor fabrication methods are used, then manufacturing process is established, but mask-set costs are high and flexibility is low
Solution Approach 1:
The patent implements re-programmable antifuse technology that allows the logic device to be dynamically reconfigured after fabrication. This enables the same physical device to adapt to different logic functions through electrical programming rather than requiring new mask sets for each configuration, thereby improving flexibility while maintaining manufacturing efficiency
Solution Approach 2:
The invention creates a universal logic device platform using Through Silicon Via (TSV) technology that can serve multiple logic families and functions. A single fabricated device can be programmed to perform different logical operations, making the manufacturing process universally applicable to diverse logic requirements without incurring additional mask-set costs
2Adaptability or versatility
If multiple logic families are produced, then diverse functionalities are achieved, but mask-set costs increase
Solution Approach 1:
The patent transitions from planar logic device fabrication to three-dimensional stacking using Through Silicon Via (TSV) technology. This vertical dimension enables multiple logic levels to be integrated in a single device structure, allowing diverse functionalities to be achieved through spatial arrangement rather than requiring separate mask sets for each logic family
Solution Approach 2:
The re-programmable antifuse mechanism allows the device to be electrically configured for different logic functions after a single fabrication process. This dynamic reconfigurability enables diverse functionalities without requiring multiple pre-fabricated mask sets, as the same physical structure can be programmed to perform different logical operations
3Productivity
If Through Silicon Via (TSV) technology is used, then interconnect efficiency is improved, but device complexity increases
Solution Approach 1:
The patent employs Through Silicon Via (TSV) technology to create vertical interconnect pathways through the silicon substrate, transitioning from two-dimensional planar interconnection to three-dimensional stacking. This enables multiple logic layers to be interconnected efficiently through the vertical dimension, improving interconnect efficiency despite the increased structural complexity of the TSV implementation
Data Source
AI summary
A 3D semiconductor device, the device including: a first level including a first single crystal layer, the first level including first transistors, where the first transistors each include a single crystal channel; first metal layers interconnecting at least the first transistors; and a second level including a second single crystal layer, the second level including second transistors, where the second level overlays the first level, where the second level is bonded to the first level, where the bonded includes oxide to oxide bonds, where the bonded includes metal to metal bonds, and where at least one of the first transistors controls power delivery to at least one of the second transistors.