3D Slice Access Memory for Universal Matrix Processing
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Solution Overview
Problem
Current data processing and storage systems, such as the Google Tensor Processing Unit (TPU) and EnLight256, are narrowly specialized and inefficient for universal matrix operations due to their focus on vector-matrix multiplication, leading to high energy costs and limited versatility.
Innovation Solution
A matrix processing apparatus with a three-dimensional slice access memory and input/output block, featuring blocks for various matrix operations like Vector-Matrix Multiplication, Matrix-Matrix Multiplication, Hadamard Product, Matrix Addition, and Matrix Determinant calculation, utilizing a shared distributed matrix memory and data bus for parallel processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional microprocessors perform arithmetic logic operations on bits and integers, then they achieve universal functionality, but they consume high energy and have limited speed for matrix operations
Solution Approach 1:
The patent replaces conventional digital electronic computing with analog optical computing. Optical fields are used to perform matrix multiplications and other mathematical operations directly in the optical domain, eliminating the need for digital-to-analog conversions and reducing energy consumption while maintaining universal mathematical functionality.
Solution Approach 2:
The invention changes the fundamental operating parameters from digital bit-level operations to continuous optical field operations. By using light intensity, phase, and polarization as computational parameters, the system achieves higher speed and lower energy consumption while performing the same mathematical functions universally.
2Productivity
If TPU and EnLight256 are designed for vector-matrix multiplication, then they achieve fast computation, but they are narrowly specialized and have limited versatility for other matrix operations
Solution Approach 1:
The patent designs an optical computing system that can perform multiple matrix operations including multiplication, addition, subtraction, transposition, and determinant calculation using a unified optical architecture. The same optical components and principles are applied across different operations, providing both high speed and universal functionality.
Solution Approach 2:
The invention uses dynamically reconfigurable optical components such as spatial light modulators and tunable lenses that can adapt their parameters in real-time to perform different matrix operations. This dynamic reconfiguration allows the system to switch between different computational functions without physical reconfiguration, maintaining high speed while achieving versatility.
3Use of energy by moving object
If optical computing devices perform analog calculations, then they reduce energy consumption, but they require precise control and calibration
Solution Approach 1:
The patent implements self-calibration mechanisms where the optical system automatically compensates for component variations and drift through feedback loops and reference measurements. The system uses built-in reference beams and calibration patterns to automatically adjust optical paths, focal lengths, and intensities, reducing the need for manual intervention while maintaining energy efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables fast, universal, and energy-efficient massively parallel matrix calculations, suitable for a wide range of tasks by providing simultaneous read/write access to entire matrices and reducing energy consumption through innovative memory technologies like memristor and photochromic SAM.
Implementation Method 1
a three-dimensional slice access memory (3D-SAM) and an input-/output block (10). The slice access memory (11) includes cells organized into cell slices, each slice storing an entire selected data matrix
Implementation Method 2
The input/output block (10) is connected to the three-dimensional slice access memory (11) and is configured to format data into a format acceptable to the three-dimensional slice access memory (11)
Implementation Method 3
a Vector-Matrix Multiplication block (VMM), a Matrix-Matrix Multiplication block (MMM)
Implementation Method 4
a Vector-Matrix Multiplication block (VMM), a Matrix-Matrix Multiplication block (MMM)
Implementation Method 5
a Hadamard Product block (HP) for element-wise multiplication of matrices
Implementation Method 6
a Matrix Addition block (MA), and a Matrix Determinant calculation block (MD)
Implementation Method 7
a Matrix Addition block (MA), and a Matrix Determinant calculation block (MD)
Implementation Method 8
Communication of computing devices with SAM is carried out by a special Matrix Data Bus (MDB), which simultaneously transmits the entire matrix as a whole
Implementation Method 9
SAM communication with external devices is performed via External Data Bus (EDB) by the Input/Output unit (IO). EDB IO unit converts data from the external device format to the SAM format
Data Source
AI summary
A matrix processing apparatus having a three-dimensional slice access memory and an input-/output block. The slice access memory includes cells organized into cell slices, each slice storing an entire selected data matrix. The three-dimensional slice access memory is configured to allow read/write access to the entire data matrix at the same time. The input/output block is connected to the three-dimensional slice access memory and is configured to format data into a format acceptable to the three-dimensional slice access memory.