3D SoIC Heat Dissipation Structure With TIM Rings

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Three-dimensional system on integrated chip structures face high heat density and poor thermal dissipation performance, leading to electromigration and reliability issues due to increased chip density and varying thermal tolerances among different materials, which can cause thermo-mechanical stress and heat distribution challenges.

Innovation Solution

The implementation of thermal interface material (TIM) rings and vertical conductive structures in dummy and molding regions, as well as within active chip areas, to create additional heat dissipation paths, utilizing materials like silver, aluminum nitride, and thermally conductive materials to channel heat away from high heat output areas and hot spots to a heat sink.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If chip density is increased in three-dimensional system on integrated chip structures, then productivity and functionality are improved, but heat density increases and thermal dissipation performance deteriorates

Engineering Contradiction:
Improvechip densityVSAvoidheat density
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent segments the heat dissipation function by introducing separate thermal interface material rings around each chip layer, rather than relying on a single bulk thermal management system. This segmentation allows localized heat management at each stacking level, improving overall thermal dissipation efficiency in high-density 3D structures

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from two-dimensional planar heat dissipation to three-dimensional vertical heat dissipation by stacking multiple chip layers with thermal interface material rings at each level. This dimensional change enables heat to be dissipated through multiple vertical pathways simultaneously, addressing the thermal challenges of increased chip density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If different materials with varying thermal tolerances are used in the chip structure, then functionality and integration are improved, but thermo-mechanical stress increases due to thermal expansion mismatches

Engineering Contradiction:
Improvematerial integrationVSAvoidthermo-mechanical stress
Core Design Contradiction:
Adaptability or versatilityVSStress or pressure

Solution Approach 1:

The patent applies local quality by placing thermal interface material rings with specific thermal and mechanical properties at strategic locations around each chip layer. These rings provide localized thermal management and mechanical compliance exactly where heat generation and material interfaces occur, rather than attempting to manage stress uniformly throughout the entire structure

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thermal interface material rings act as intermediary elements between chips with different thermal tolerances and the surrounding structure. These rings mediate the thermal and mechanical interactions, allowing different materials to be integrated while reducing direct thermal expansion mismatches between dissimilar materials

Inventive Principle:
Principle #24Intermediary (Mediator)

3Temperature

If thermal interface material rings are added to improve heat dissipation, then thermal dissipation performance is improved, but device complexity increases

Engineering Contradiction:
Improvethermal dissipation performanceVSAvoidstructure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The thermal interface material rings serve multiple functions simultaneously: they provide thermal conduction pathways, mechanical compliance, stress distribution, and structural support. This multi-functionality improves thermal dissipation while minimizing the need for additional separate components, thereby limiting the increase in device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The thermal interface material rings are nested around each chip layer within the vertical stack, integrating the thermal management function into the existing chip architecture rather than adding external components. This nesting approach improves heat dissipation while maintaining a compact structure with minimal increase in overall device complexity

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces the average operating temperature of memory chips below 90°C, improving thermal dissipation and reducing electromigration risks by enhancing heat conductivity and managing thermal stress across the 3D SoIC structure.

Implementation Method 1

The implementation of thermal interface material (TIM) rings and vertical conductive structures... to create additional heat dissipation paths, utilizing materials like silver, aluminum nitride, and thermally conductive materials to channel heat away from high heat output areas and hot spots to a heat sink

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

channel heat away from high heat output areas and hot spots to a heat sink

Methodology Applied
Scientific EffectHeat dissipation: Heat Sink

Data Source

PatentUS20240413052A1Heat Dissipation Structures
Publication Date: 2024.12.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240413052A1 patent drawing
  • US20240413052A1 patent drawing
  • US20240413052A1 patent drawing

AI summary

The present disclosure describes heat dissipating structures that can be formed either in functional or non-functional areas of three-dimensional system on integrated chip structures. In some embodiments, the heat dissipating structures maintain an average operating temperature of memory dies or chips below about 90° C. For example, a structure includes a stack with chip layers, where each chip layer includes one or more chips and an edge portion. The structure further includes a thermal interface material disposed on the edge portion of each chip layer, a thermal interface material layer disposed over a top chip layer of the stack, and a heat sink over the thermal interface material layer.