3D Memory Stack Support Structure for Thermal Tilt Stability

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Solution Overview

Problem

The integration limits of two-dimensional nonvolatile memory elements have been reached, necessitating the development of three-dimensional structures, which face challenges in maintaining structural stability and reliability due to heat-induced expansion and tilting of support structures during manufacturing processes.

Innovation Solution

A semiconductor device with a stack structure featuring alternating interlayer insulating and gate conductive layers, channel plugs, and support structures of varying types, along with an auxiliary support structure to stabilize the stack, is manufactured by etching and filling specific trenches and holes with insulating layers to prevent tilting and expansion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If three-dimensional stack structure is implemented to improve integration density, then memory capacity is improved, but structural stability deteriorates due to heat-induced expansion and tilting of support structures

Engineering Contradiction:
Improvememory capacityVSAvoidstructural stability
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The support structure is divided into multiple segments: a first support structure (insulating layer) and a second support structure (conductive layer) arranged alternately. This segmentation allows each layer to perform its specific function - the insulating layer provides electrical isolation while the conductive layer provides mechanical support and heat dissipation, collectively maintaining structural stability in the three-dimensional stack configuration

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The support structure employs a composite design combining insulating material (first support structure) and conductive material (second support structure) in an alternating layered configuration. This composite structure leverages the complementary properties of both materials - the insulating properties of the first layer and the conductive/mechanical properties of the second layer - to achieve both electrical isolation and structural stability simultaneously

Inventive Principle:
Principle #40Composite materials

2Reliability

If manufacturing processes are performed at elevated temperatures, then material properties are improved, but support structures expand and tilt due to thermal effects

Engineering Contradiction:
Improvematerial propertiesVSAvoidsupport structure precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent acknowledges thermal expansion as an inherent phenomenon during manufacturing and designs the alternating support structure to accommodate and mitigate its effects. The distributed alternating layers of insulating and conductive materials provide a more uniform thermal response, reducing localized stress and preventing tilting while maintaining manufacturing precision

Inventive Principle:
Principle #37Thermal expansion

Solution Approach 2:

The first support structure (insulating layer) acts as an intermediary between the second support structure (conductive layer) and the stack structure. This intermediary layer provides thermal isolation and stress distribution, preventing direct heat transfer that would cause expansion and tilting of the conductive support structures during elevated temperature manufacturing processes

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12564053B2Semiconductor device and method of manufacturing the semiconductor device
Publication Date: 2026.02.24 SK HYNIX INC
  • US12564053B2 patent drawing
  • US12564053B2 patent drawing
  • US12564053B2 patent drawing

AI summary

The present technology relates to a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers that are alternately stacked, a channel plug at least partially passing through the stack structure on a cell region, and a plurality of support structures at least partially passing through the stack structure on a contact region.