3D Stack Scan Testing via Non-Scan I/O Channels

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Solution Overview

Problem

In three-dimensional integrated circuits (3D ICs), efficiently routing scan data between dies is challenging due to the need for additional through-silicon vias (TSVs) which increase area and cost, and restrict die floor planning, especially when scan I/O data signals require dedicated channels.

Innovation Solution

The method involves using preexisting non-scan I/O data channels, partitioned into groups, to route scan data without dedicated scan I/O channels, employing a voter circuit to determine the scan data value from multiple copies, and performing repair operations on failing channels to ensure continuous data transfer during scan testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If dedicated scan I/O channels with TSVs are added between dies, then scan testing capability is improved, but area and cost increase

Engineering Contradiction:
Improvescan testing capabilityVSAvoiddie area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent applies multi-functionality by enabling existing non-scan I/O channels to perform scan testing functions. The same physical channels that carry normal operational data are reused for scan data transmission, eliminating the need for dedicated scan channels. This is achieved through control logic that switches the channel function between operational mode and scan testing mode based on test requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges scan testing functionality with existing non-scan I/O channels. Instead of creating separate dedicated scan channels, the scan testing capability is integrated into the existing I/O infrastructure. The control logic combines the functions of data transmission and scan testing within the same physical channel framework.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If dedicated scan I/O channels with TSVs are added between dies, then scan testing capability is improved, but cost increases

Engineering Contradiction:
Improvescan testing capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

The patent applies multi-functionality by enabling existing non-scan I/O channels to perform scan testing functions. The same physical channels that carry normal operational data are reused for scan data transmission, eliminating the need for dedicated scan channels. This is achieved through control logic that switches the channel function between operational mode and scan testing mode based on test requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges scan testing functionality with existing non-scan I/O channels. Instead of creating separate dedicated scan channels, the scan testing capability is integrated into the existing I/O infrastructure. The control logic combines the functions of data transmission and scan testing within the same physical channel framework.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If additional TSVs are added for scan data transfer, then scan testing is enabled, but die floor planning flexibility is restricted

Engineering Contradiction:
Improvescan testing capabilityVSAvoiddie floor planning flexibility
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent applies multi-functionality by enabling existing non-scan I/O channels to perform scan testing functions. The same physical channels that carry normal operational data are reused for scan data transmission, eliminating the need for dedicated scan channels. This is achieved through control logic that switches the channel function between operational mode and scan testing mode based on test requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges scan testing functionality with existing non-scan I/O channels. Instead of creating separate dedicated scan channels, the scan testing capability is integrated into the existing I/O infrastructure. The control logic combines the functions of data transmission and scan testing within the same physical channel framework.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12099091B2Cost-saving scheme for scan testing of 3D stack die
Publication Date: 2024.09.24 ADVANCED MICRO DEVICES INC
  • US12099091B2 patent drawing
  • US12099091B2 patent drawing
  • US12099091B2 patent drawing

AI summary

A system and method for efficiently routing scan data between two dies used in three-dimensional packaging are described. In various implementations, a computing system includes at least a first semiconductor die (or first die) and a second die connected to one another within a three-dimensional (3D) package. The first die and the second die have multiple non-scan input/output (I/O) data channels between them for data transfer. The non-scan I/O data channels are partitioned into groups. The first die receives a given scan input data bit for testing a device under test (DUT) on the second die. The first die selects a first group of non-scan I/O data channels, and sends, to the second die, a copy of the given scan input data bit on each non-scan I/O data channel of the first group. The second die uses a voter circuit to determine the value of the given scan input data bit.