3D Memory Stack Structure With Upper-Only Dummy Channels

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Solution Overview

Problem

Current integrated circuit devices face challenges in achieving high data storage capacity and reliability, particularly in three-dimensional memory systems where defects occur due to unstripping of sacrificial layers during the manufacturing process.

Innovation Solution

The integration of dummy vertical channel structures that penetrate through only the upper stack group, preventing unstripping defects by not forming sacrificial layers below them, and optimizing the stack structure to improve reliability and prevent defects in the semiconductor device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If dummy vertical channel structures are formed to penetrate through the entire stack structure (both lower and upper stack groups), then the manufacturing process is simplified, but unstripping defects occur in the lower sacrificial layers

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddefect prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The dummy vertical channel structures are segmented into two types: first dummy vertical channel structures that penetrate only the upper stack group, and second dummy vertical channel structures that penetrate both the lower and upper stack groups. This segmentation allows the region below the lower stack group to be free of sacrificial layers, preventing unstripping defects while maintaining manufacturing feasibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the device are assigned different dummy vertical channel structure configurations. The memory cell region contains channel structures penetrating through both stack groups, while the first connection region contains only first dummy vertical channel structures penetrating the upper stack group. This local differentiation resolves the contradiction by applying the appropriate structure in each region.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the stack structure is extended with additional lower stack group to increase storage capacity, then data storage capacity is improved, but the complexity of sacrificial layer management increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidsacrificial layer management
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The harmful sacrificial layers are extracted or removed from the region below the lower stack group. By configuring first dummy vertical channel structures to penetrate only the upper stack group and not extend into the lower stack group region, the sacrificial layers in that region are eliminated, simplifying their management while preserving the extended stack structure for increased storage capacity.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20230301101A1Semiconductor devices and data storage systems including the same
Publication Date: 2023.09.21 SAMSUNG ELECTRONICS CO LTD
  • US20230301101A1 patent drawing
  • US20230301101A1 patent drawing
  • US20230301101A1 patent drawing

AI summary

An integrated circuit memory device includes a stack structure on a semiconductor substrate. The stack structure includes a first gate stack group, which includes a plurality of spaced-apart first gate electrodes, and a second gate stack group, which includes a plurality of spaced-apart second gate electrodes. The second gate stack group extends on the first gate stack group so that the first gate stack group extends between the second gate stack group and the substrate. A plurality of active channel structures are provided, which penetrate vertically through the second gate stack group as upper channel structures and through the first gate stack group as lower channel structures. A plurality of dummy channel structures are provided, which penetrate vertically through the second gate stack group but not through the first gate stack group.