3D-Stacked Gate Structures for Polarity-Specific Process Control
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Solution Overview
Problem
In 3D-stacked semiconductor devices, controlling process variations for gate structures with different work-function metal layers in nanometer-scale dimensions is challenging, especially with the backside power distribution network (BSPDN) structure, where transistors at different levels have distinct polarities and materials.
Innovation Solution
The semiconductor device features vertically isolated gate structures using semiconductor layers of sufficient thickness, with channel structures of different materials (SiGe and Si) and lengths, and gate structures of varying lengths, allowing for improved isolation and manufacturing control through a method involving alternating stacks of sacrificial and channel layers, and dummy gate structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different work-function metal layers are used for gate structures at different levels to achieve different transistor polarities, then device functionality is improved, but manufacturing precision deteriorates due to process variations in nanometer-scale dimensions
Solution Approach 1:
The gate structures at different levels are segmented into separate formation processes. The first gate structure is formed before substrate removal, while the second gate structure is formed after substrate removal. This segmentation allows each gate to be independently optimized for its specific polarity requirements without interfering with the other's manufacturing precision.
Solution Approach 2:
The first gate structure is formed in advance before the substrate is removed. This preliminary action allows the first gate's work-function metal layer to be precisely controlled during the initial fabrication process, establishing a stable foundation before the complex substrate removal and second gate formation steps begin.
2Productivity
If 3D-stacked configuration with different polarity transistors is implemented, then device density and performance are improved, but process variation control becomes more difficult
Solution Approach 1:
The fabrication process is segmented into distinct phases: first gate formation, substrate removal, and second gate formation. This segmentation breaks down the complex process of creating different polarity transistors in 3D-stack into manageable stages, allowing better control of process variations at each stage rather than attempting to control all variables simultaneously.
Solution Approach 2:
The first gate structure is formed as a preliminary step before substrate removal. This allows the first gate's dimensional parameters to be established with high precision before the substrate removal process introduces additional variability, enabling better overall process control for the 3D-stacked device.
3Measurement precision
If gate structures are formed with different work-function metal layers, then transistor threshold voltage control is improved, but structural complexity increases
Solution Approach 1:
The gate structures are segmented into two distinct formation sequences, allowing each gate to have its specific work-function metal layer tailored to its polarity requirements. This segmentation enables precise threshold voltage control for each transistor type while managing material complexity through process sequencing rather than simultaneous multi-material deposition.
Solution Approach 2:
The first gate's work-function metal layer is deposited and configured in advance during the initial fabrication stages, establishing precise threshold voltage characteristics before the substrate is removed and the second gate is formed. This preliminary configuration simplifies the overall process by handling one gate's material complexity at a time rather than managing both gates' material variations simultaneously.
Data Source
AI summary
Provided is a semiconductor device which includes: 1st source/drain regions connected through a 1st channel structure which is controlled by a 1st gate structure; and a 2nd source/drain regions, respectively above the 1st source/drain regions, connected through a 2nd channel structure which is controlled by a 2nd gate structure, wherein the 1st channel structure and the 2nd channel structure comprise different materials.