3D Stacked Active Pixel Sensor Shared Conversion Gain
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Solution Overview
Problem
As pixel size decreases in active pixel sensors, the reduced light sensitivity leads to lower image quality due to shared transistors increasing parasitic capacitance and lowering conversion gain, which is undesirable, especially under low illumination conditions.
Innovation Solution
A 3D stacked active pixel sensor configuration with shared processing and amplification circuits, including a charge amplifier, allows for larger light-sensitive elements and reduces parasitic capacitance by optimizing capacitor ratios and eliminating the need for a floating diffusion region on the circuit die, thereby maintaining conversion gain and improving photo response non-uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If pixel size is reduced to increase sensor array density, then the number of pixels increases, but the photodiode area decreases leading to reduced light reception and lower image quality
Solution Approach 1:
The patent transitions from a planar 2D pixel arrangement to a 3D stacked architecture where photodiodes are positioned vertically above shared transistors. This dimensional change allows multiple pixels to share common circuitry in the vertical dimension, increasing pixel density without proportionally increasing parasitic capacitance, thereby maintaining conversion gain while accommodating more pixels.
Solution Approach 2:
Multiple pixels share common transistors (such as reset transistors and readout circuitry) located in a shared region below the photodiode array. This merging of circuitry reduces the total transistor count and associated parasitic capacitance per pixel, allowing smaller photodiodes to maintain adequate conversion gain while increasing overall pixel density.
2Area of moving object
If multiple pixels share transistors to increase fill factor, then the photodiode area ratio increases, but parasitic capacitance increases leading to lower conversion gain
Solution Approach 1:
The patent positions photodiodes vertically above shared transistors in a 3D stacked configuration, separating the light-sensitive element from the circuitry in the vertical dimension. This spatial separation allows the photodiode to achieve high fill factor while the shared transistors are located in a common region below, minimizing the parasitic capacitance contribution to each pixel's floating diffusion node.
Solution Approach 2:
The patent introduces a specialized shared region with optimized transistor placement and wiring that acts as an intermediary between multiple photodiodes and the readout circuitry. This intermediate structure minimizes the parasitic capacitance coupling between shared transistors and individual pixel floating diffusion nodes, allowing high fill factor without proportionally increasing noise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances image quality by maintaining conversion gain and reducing noise, achieving higher sensitivity under low illumination conditions while minimizing parasitic capacitance and smear effects.
Implementation Method 1
Each pixel includes a light sensitive element
Data Source
AI summary
An active pixel sensor comprising: a plurality of pixels, wherein each pixel includes a light sensitive element and a transfer gate, and the plurality of pixels have at least one floating diffusion region; and a plurality of processing circuits associated with the plurality of pixels; wherein each processing circuit comprises a charge amplifier.


